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Subject: Re: [PATCH] Add StorCenter DTS first draft.
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Segher Boessenkool <segher@kernel.crashing.org>
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Date: Thu, 19 Jul 2007 07:54:38 +1000
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On Wed, 2007-07-18 at 18:13 +0200, Segher Boessenkool wrote:
> >> +		PowerPC,603e {			/* Really 8241 */
> >> +			device_type = "cpu";
> >> +			reg = <0>;
> >> +			clock-frequency = <d# 200000000>;	/* Hz */
> >> +			timebase-frequency = <d# 33333333>;	/* Hz */
> >> +			bus-frequency = <0>;
> >> +			/* Following required by dtc but not used */
> >> +			i-cache-line-size = <0>;
> >> +			d-cache-line-size = <0>;
> >> +			i-cache-size = <4000>;
> >> +			d-cache-size = <4000>;
> >> +		};
> >
> > The 32 bits kernel may not be using those yet, but it will. 64 bits  
> > does
> > already and I plan to merge those bits at one point.
> 
> Hrm, what does it use it for?  Are you going to require
> all other defined CPU properties as well (like the PowerPC
> binding does)?

Cache line size is used by the kernel on ppc64 for things like clearing
memory (to get the stride between subsequent dcbz) or flushing the
cache :-) It's also passed on to userland.

If it's absent from the device-tree, we default to the values in the
cputable, but if you're going to put the properties in the tree, don't
put a 0 in there. As it is, the day I make the 64 bits code common, your
DT will break unless I special case "0".

Ben.