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Subject: Re: [PATCH] add Altivec/VMX state to coredumps
From: Michael Ellerman <michael@ellerman.id.au>
To: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
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Date: Thu, 27 Sep 2007 12:53:56 +1000
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On Wed, 2007-09-26 at 09:42 +0200, Geert Uytterhoeven wrote:
> On Wed, 26 Sep 2007, Kumar Gala wrote:
> > On Sep 25, 2007, at 11:56 PM, Mark Nelson wrote:
> > > What cores have SPE at the moment? Also, perhaps more importantly, =20
> > > are there any plans to have Altivec and SPE in the same core?
> >=20
> > The e500 cores's from Freescale.
> >=20
> > No, they are pretty much mutually exclusive.
>=20
> Bummer, only now do I realize this thread is not about the Synergistic
> Processing Elements but about the Signal Processing Extension...

Yeah, it's a bit of a downer. Luckily most of the Cell kernel code uses
SPU rather than SPE.

Happily it looks like SPU will become ambiguous if Niagara II support
lands in the kernel:
http://realworldtech.com/page.cfm?ArticleID=3DRWT090406012516&p=3D2

sigh :)

--=20
Michael Ellerman
OzLabs, IBM Australia Development Lab

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person

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