* [PATCH 1/9] add e300c4 entry to cputable @ 2007-10-10 10:06 Li Yang 2007-10-10 10:06 ` [PATCH 2/9] ipic: add new interrupts introduced by new chip Li Yang 0 siblings, 1 reply; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/kernel/cputable.c | 13 ++++++++++++- 1 files changed, 12 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index b1f8000..d80c365 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -910,7 +910,7 @@ static struct cpu_spec cpu_specs[] = { .cpu_setup = __setup_cpu_603, .platform = "ppc603", }, - { /* e300c3 on 83xx */ + { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ .pvr_mask = 0x7fff0000, .pvr_value = 0x00850000, .cpu_name = "e300c3", @@ -921,6 +921,17 @@ static struct cpu_spec cpu_specs[] = { .cpu_setup = __setup_cpu_603, .platform = "ppc603", }, + { /* e300c4 (e300c1, plus one IU) */ + .pvr_mask = 0x7fff0000, + .pvr_value = 0x00860000, + .cpu_name = "e300c4", + .cpu_features = CPU_FTRS_E300, + .cpu_user_features = COMMON_USER, + .icache_bsize = 32, + .dcache_bsize = 32, + .cpu_setup = __setup_cpu_603, + .platform = "ppc603", + }, { /* default match, we assume split I/D cache & TB (non-601)... */ .pvr_mask = 0x00000000, .pvr_value = 0x00000000, -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/9] ipic: add new interrupts introduced by new chip 2007-10-10 10:06 [PATCH 1/9] add e300c4 entry to cputable Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 3/9] add Freescale SerDes PHY support Li Yang 0 siblings, 1 reply; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang These interrupts are introduced by the latest Freescale SoC such as MPC837x. The patch also adds comment to interrupts. Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/sysdev/ipic.c | 224 ++++++++++++++++++++++++++++++++++---------- arch/powerpc/sysdev/ipic.h | 7 +- include/asm-powerpc/ipic.h | 12 ++- 3 files changed, 186 insertions(+), 57 deletions(-) diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 473c415..ea4f695 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -33,7 +33,31 @@ static struct ipic * primary_ipic; static DEFINE_SPINLOCK(ipic_lock); static struct ipic_info ipic_info[] = { - [9] = { + [1] = { /* PEX1 CNT */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_C, + .force = IPIC_SIFCR_H, + .bit = 16, + .prio_mask = 0, + }, + [2] = { /* PEX2 CNT */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_C, + .force = IPIC_SIFCR_H, + .bit = 17, + .prio_mask = 1, + }, + [4] = { /* MSIR1 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_C, + .force = IPIC_SIFCR_H, + .bit = 19, + .prio_mask = 3, + }, + [9] = { /* UART1 */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_D, @@ -41,7 +65,7 @@ static struct ipic_info ipic_info[] = { .bit = 24, .prio_mask = 0, }, - [10] = { + [10] = { /* UART2 */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_D, @@ -49,7 +73,7 @@ static struct ipic_info ipic_info[] = { .bit = 25, .prio_mask = 1, }, - [11] = { + [11] = { /* SEC */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_D, @@ -57,7 +81,23 @@ static struct ipic_info ipic_info[] = { .bit = 26, .prio_mask = 2, }, - [14] = { + [12] = { /* eTSEC1 1588 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_D, + .force = IPIC_SIFCR_H, + .bit = 27, + .prio_mask = 3, + }, + [13] = { /* eTSEC2 1588 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_D, + .force = IPIC_SIFCR_H, + .bit = 28, + .prio_mask = 4, + }, + [14] = { /* I2C1 */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_D, @@ -65,7 +105,7 @@ static struct ipic_info ipic_info[] = { .bit = 29, .prio_mask = 5, }, - [15] = { + [15] = { /* I2C2 */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_D, @@ -73,7 +113,7 @@ static struct ipic_info ipic_info[] = { .bit = 30, .prio_mask = 6, }, - [16] = { + [16] = { /* SPI */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_D, @@ -81,7 +121,7 @@ static struct ipic_info ipic_info[] = { .bit = 31, .prio_mask = 7, }, - [17] = { + [17] = { /* IRQ1 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, @@ -89,7 +129,7 @@ static struct ipic_info ipic_info[] = { .bit = 1, .prio_mask = 5, }, - [18] = { + [18] = { /* IRQ2 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, @@ -97,7 +137,7 @@ static struct ipic_info ipic_info[] = { .bit = 2, .prio_mask = 6, }, - [19] = { + [19] = { /* IRQ3 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, @@ -105,7 +145,7 @@ static struct ipic_info ipic_info[] = { .bit = 3, .prio_mask = 7, }, - [20] = { + [20] = { /* IRQ4 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, @@ -113,7 +153,7 @@ static struct ipic_info ipic_info[] = { .bit = 4, .prio_mask = 4, }, - [21] = { + [21] = { /* IRQ5 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, @@ -121,7 +161,7 @@ static struct ipic_info ipic_info[] = { .bit = 5, .prio_mask = 5, }, - [22] = { + [22] = { /* IRQ 6 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, @@ -129,7 +169,7 @@ static struct ipic_info ipic_info[] = { .bit = 6, .prio_mask = 6, }, - [23] = { + [23] = { /* IRQ7 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_B, @@ -137,7 +177,7 @@ static struct ipic_info ipic_info[] = { .bit = 7, .prio_mask = 7, }, - [32] = { + [32] = { /* TSEC1 Tx/QE High */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -145,7 +185,7 @@ static struct ipic_info ipic_info[] = { .bit = 0, .prio_mask = 0, }, - [33] = { + [33] = { /* TSEC1 Rx/QE Low */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -153,7 +193,7 @@ static struct ipic_info ipic_info[] = { .bit = 1, .prio_mask = 1, }, - [34] = { + [34] = { /* TSEC1 Err */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -161,7 +201,7 @@ static struct ipic_info ipic_info[] = { .bit = 2, .prio_mask = 2, }, - [35] = { + [35] = { /* TSEC2 Tx */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -169,7 +209,7 @@ static struct ipic_info ipic_info[] = { .bit = 3, .prio_mask = 3, }, - [36] = { + [36] = { /* TSEC2 Rx */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -177,7 +217,7 @@ static struct ipic_info ipic_info[] = { .bit = 4, .prio_mask = 4, }, - [37] = { + [37] = { /* TSEC2 Err */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -185,7 +225,7 @@ static struct ipic_info ipic_info[] = { .bit = 5, .prio_mask = 5, }, - [38] = { + [38] = { /* USB DR */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -193,7 +233,7 @@ static struct ipic_info ipic_info[] = { .bit = 6, .prio_mask = 6, }, - [39] = { + [39] = { /* USB MPH */ .pend = IPIC_SIPNR_H, .mask = IPIC_SIMSR_H, .prio = IPIC_SIPRR_A, @@ -201,7 +241,47 @@ static struct ipic_info ipic_info[] = { .bit = 7, .prio_mask = 7, }, - [48] = { + [42] = { /* eSDHC */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_B, + .force = IPIC_SIFCR_H, + .bit = 10, + .prio_mask = 2, + }, + [44] = { /* SATA1 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_B, + .force = IPIC_SIFCR_H, + .bit = 12, + .prio_mask = 4, + }, + [45] = { /* SATA2 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_B, + .force = IPIC_SIFCR_H, + .bit = 13, + .prio_mask = 5, + }, + [46] = { /* SATA3 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_B, + .force = IPIC_SIFCR_H, + .bit = 14, + .prio_mask = 6, + }, + [47] = { /* SATA4 */ + .pend = IPIC_SIPNR_H, + .mask = IPIC_SIMSR_H, + .prio = IPIC_SIPRR_B, + .force = IPIC_SIFCR_H, + .bit = 15, + .prio_mask = 7, + }, + [48] = { /* IRQ0 */ .pend = IPIC_SEPNR, .mask = IPIC_SEMSR, .prio = IPIC_SMPRR_A, @@ -209,7 +289,7 @@ static struct ipic_info ipic_info[] = { .bit = 0, .prio_mask = 4, }, - [64] = { + [64] = { /* RTC SEC */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_A, @@ -217,7 +297,7 @@ static struct ipic_info ipic_info[] = { .bit = 0, .prio_mask = 0, }, - [65] = { + [65] = { /* PIT */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_A, @@ -225,7 +305,7 @@ static struct ipic_info ipic_info[] = { .bit = 1, .prio_mask = 1, }, - [66] = { + [66] = { /* PCI */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_A, @@ -233,7 +313,7 @@ static struct ipic_info ipic_info[] = { .bit = 2, .prio_mask = 2, }, - [67] = { + [67] = { /* MSIR0 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_A, @@ -241,7 +321,7 @@ static struct ipic_info ipic_info[] = { .bit = 3, .prio_mask = 3, }, - [68] = { + [68] = { /* RTC ALR */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_B, @@ -249,7 +329,7 @@ static struct ipic_info ipic_info[] = { .bit = 4, .prio_mask = 0, }, - [69] = { + [69] = { /* MU */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_B, @@ -257,7 +337,7 @@ static struct ipic_info ipic_info[] = { .bit = 5, .prio_mask = 1, }, - [70] = { + [70] = { /* SBA */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_B, @@ -265,7 +345,7 @@ static struct ipic_info ipic_info[] = { .bit = 6, .prio_mask = 2, }, - [71] = { + [71] = { /* DMA */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = IPIC_SMPRR_B, @@ -273,91 +353,133 @@ static struct ipic_info ipic_info[] = { .bit = 7, .prio_mask = 3, }, - [72] = { + [72] = { /* GTM4 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 8, }, - [73] = { + [73] = { /* GTM8 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 9, }, - [74] = { + [74] = { /* GPIO1/QE Ports */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 10, }, - [75] = { + [75] = { /* GPIO2/SDDR */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 11, }, - [76] = { + [76] = { /* DDR */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 12, }, - [77] = { + [77] = { /* LBC */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 13, }, - [78] = { + [78] = { /* GTM2 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 14, }, - [79] = { + [79] = { /* GTM6 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 15, }, - [80] = { + [80] = { /* PMC */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 16, }, - [84] = { + [81] = { /* MSIR2 */ + .pend = IPIC_SIPNR_L, + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 17, + }, + [82] = { /* MSIR3 */ + .pend = IPIC_SIPNR_L, + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 18, + }, + [84] = { /* GTM3 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 20, }, - [85] = { + [85] = { /* GTM7 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 21, }, - [90] = { + [86] = { /* MSIR4 */ + .pend = IPIC_SIPNR_L, + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 22, + }, + [87] = { /* MSIR5 */ + .pend = IPIC_SIPNR_L, + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 23, + }, + [88] = { /* MSIR6 */ + .pend = IPIC_SIPNR_L, + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 24, + }, + [89] = { /* MSIR7 */ + .pend = IPIC_SIPNR_L, + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 25, + }, + [90] = { /* GTM1 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, .force = IPIC_SIFCR_L, .bit = 26, }, - [91] = { + [91] = { /* GTM5 */ .pend = IPIC_SIPNR_L, .mask = IPIC_SIMSR_L, .prio = 0, @@ -596,6 +718,10 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) * configure SICFR accordingly */ if (flags & IPIC_SPREADMODE_GRP_A) temp |= SICFR_IPSA; + if (flags & IPIC_SPREADMODE_GRP_B) + temp |= SICFR_IPSB; + if (flags & IPIC_SPREADMODE_GRP_C) + temp |= SICFR_IPSC; if (flags & IPIC_SPREADMODE_GRP_D) temp |= SICFR_IPSD; if (flags & IPIC_SPREADMODE_MIX_A) @@ -603,7 +729,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) if (flags & IPIC_SPREADMODE_MIX_B) temp |= SICFR_MPSB; - ipic_write(ipic->regs, IPIC_SICNR, temp); + ipic_write(ipic->regs, IPIC_SICFR, temp); /* handle MCP route */ temp = 0; @@ -675,10 +801,12 @@ void ipic_set_highest_priority(unsigned int virq) void ipic_set_default_priority(void) { - ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_SIPRR_A_DEFAULT); - ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_SIPRR_D_DEFAULT); - ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_SMPRR_A_DEFAULT); - ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_SMPRR_B_DEFAULT); + ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT); + ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT); + ipic_write(primary_ipic->regs, IPIC_SIPRR_C, IPIC_PRIORITY_DEFAULT); + ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_PRIORITY_DEFAULT); + ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_PRIORITY_DEFAULT); + ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT); } void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq) diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h index c28e589..cd74302 100644 --- a/arch/powerpc/sysdev/ipic.h +++ b/arch/powerpc/sysdev/ipic.h @@ -23,13 +23,12 @@ #define IPIC_IRQ_EXT7 23 /* Default Priority Registers */ -#define IPIC_SIPRR_A_DEFAULT 0x05309770 -#define IPIC_SIPRR_D_DEFAULT 0x05309770 -#define IPIC_SMPRR_A_DEFAULT 0x05309770 -#define IPIC_SMPRR_B_DEFAULT 0x05309770 +#define IPIC_PRIORITY_DEFAULT 0x05309770 /* System Global Interrupt Configuration Register */ #define SICFR_IPSA 0x00010000 +#define SICFR_IPSB 0x00020000 +#define SICFR_IPSC 0x00040000 #define SICFR_IPSD 0x00080000 #define SICFR_MPSA 0x00200000 #define SICFR_MPSB 0x00400000 diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h index edec79d..8ff08be 100644 --- a/include/asm-powerpc/ipic.h +++ b/include/asm-powerpc/ipic.h @@ -20,11 +20,13 @@ /* Flags when we init the IPIC */ #define IPIC_SPREADMODE_GRP_A 0x00000001 -#define IPIC_SPREADMODE_GRP_D 0x00000002 -#define IPIC_SPREADMODE_MIX_A 0x00000004 -#define IPIC_SPREADMODE_MIX_B 0x00000008 -#define IPIC_DISABLE_MCP_OUT 0x00000010 -#define IPIC_IRQ0_MCP 0x00000020 +#define IPIC_SPREADMODE_GRP_B 0x00000002 +#define IPIC_SPREADMODE_GRP_C 0x00000004 +#define IPIC_SPREADMODE_GRP_D 0x00000008 +#define IPIC_SPREADMODE_MIX_A 0x00000010 +#define IPIC_SPREADMODE_MIX_B 0x00000020 +#define IPIC_DISABLE_MCP_OUT 0x00000040 +#define IPIC_IRQ0_MCP 0x00000080 /* IPIC registers offsets */ #define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */ -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/9] add Freescale SerDes PHY support 2007-10-10 10:06 ` [PATCH 2/9] ipic: add new interrupts introduced by new chip Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 4/9] add platform support for MPC837x MDS board Li Yang 2007-10-11 0:59 ` [PATCH 3/9] add Freescale SerDes PHY support Stephen Rothwell 0 siblings, 2 replies; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang The SerDes(serializer/deserializer) PHY block is a new SoC block used in Freescale chips to support multiple serial interfaces, such as PCI Express, SGMII, SATA. Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/platforms/Kconfig | 4 + arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/fsl_serdes.c | 170 ++++++++++++++++++++++++++++++++++++++ arch/powerpc/sysdev/fsl_serdes.h | 36 ++++++++ 4 files changed, 211 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/sysdev/fsl_serdes.c create mode 100644 arch/powerpc/sysdev/fsl_serdes.h diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 19d4628..e89f803 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -291,4 +291,8 @@ config FSL_ULI1575 Freescale reference boards. The boards all use the ULI in pretty much the same way. +config FSL_SERDES + bool + default n + endmenu diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 08ce31e..315aa36 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -19,6 +19,7 @@ mv64x60-$(CONFIG_PCI) += mv64x60_pci.o obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o obj-$(CONFIG_AXON_RAM) += axonram.o +obj-$(CONFIG_FSL_SERDES) += fsl_serdes.o # contains only the suspend handler for time ifeq ($(CONFIG_RTC_CLASS),) diff --git a/arch/powerpc/sysdev/fsl_serdes.c b/arch/powerpc/sysdev/fsl_serdes.c new file mode 100644 index 0000000..8a04395 --- /dev/null +++ b/arch/powerpc/sysdev/fsl_serdes.c @@ -0,0 +1,170 @@ +/* + * arch/powerpc/sysdev/fsl_serdes.c + * + * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: Li Yang <leoli@freescale.com> + * + * Freescale SerDes initialization routines + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/stddef.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/delay.h> + +#include <asm/system.h> +#include <asm/io.h> +#include <asm/machdep.h> +#include <asm/prom.h> + +#include "fsl_serdes.h" + +static int __init setup_serdes(struct device_node *np) +{ + void __iomem *regs; + const void *prot; + const unsigned int *freq; + struct resource res; + u32 tmp, rfcks; + + of_address_to_resource(np, 0, &res); + regs = ioremap(res.start, res.end - res.start + 1); + + prot = of_get_property(np, "protocol", NULL); + if (!prot) + return -EINVAL; + freq = of_get_property(np, "clock", NULL); + switch (*freq) { + case 100: + rfcks = FSL_SRDSCR4_RFCKS_100; + break; + case 125: + rfcks = FSL_SRDSCR4_RFCKS_125; + break; + case 150: + rfcks = FSL_SRDSCR4_RFCKS_150; + break; + default: + printk(KERN_ERR "SerDes: Wrong frequency\n"); + return -EINVAL; + } + + /* Use default prescale and counter */ + + /* 1.0V corevdd */ + if (of_get_property(np, "vdd-1v", NULL)) { + /* DPPE/DPPA = 0 */ + tmp = in_be32(regs + FSL_SRDSCR0_OFFS); + tmp &= ~FSL_SRDSCR0_DPP_1V2; + out_be32(regs + FSL_SRDSCR0_OFFS, tmp); + + /* VDD = 0 */ + tmp = in_be32(regs + FSL_SRDSCR2_OFFS); + tmp &= ~FSL_SRDSCR2_VDD_1V2; + out_be32(regs + FSL_SRDSCR2_OFFS, tmp); + } + + /* protocol specific configuration */ + if (!strcmp(prot, "sata")) { + /* Set and clear reset bits */ + tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS); + tmp |= FSL_SRDSRSTCTL_SATA_RESET; + out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); + mdelay(1); + tmp &= ~FSL_SRDSRSTCTL_SATA_RESET; + out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); + + /* Configure SRDSCR1 */ + tmp = in_be32(regs + FSL_SRDSCR1_OFFS); + tmp &= ~FSL_SRDSCR1_PLLBW; + out_be32(regs + FSL_SRDSCR1_OFFS, tmp); + + /* Configure SRDSCR2 */ + tmp = in_be32(regs + FSL_SRDSCR2_OFFS); + tmp &= ~FSL_SRDSCR2_SEIC_MASK; + tmp |= FSL_SRDSCR2_SEIC_SATA; + out_be32(regs + FSL_SRDSCR2_OFFS, tmp); + + /* Configure SRDSCR3 */ + tmp = FSL_SRDSCR3_KFR_SATA | FSL_SRDSCR3_KPH_SATA | + FSL_SRDSCR3_SDFM_SATA_PEX | + FSL_SRDSCR3_SDTXL_SATA; + out_be32(regs + FSL_SRDSCR3_OFFS, tmp); + + /* Configure SRDSCR4 */ + tmp = rfcks | FSL_SRDSCR4_PROT_SATA; + out_be32(regs + FSL_SRDSCR4_OFFS, tmp); + + } else if (!strcmp(prot, "pcie")) { + /* Configure SRDSCR1 */ + tmp = in_be32(regs + FSL_SRDSCR1_OFFS); + tmp |= FSL_SRDSCR1_PLLBW; + out_be32(regs + FSL_SRDSCR1_OFFS, tmp); + + /* Configure SRDSCR2 */ + tmp = in_be32(regs + FSL_SRDSCR2_OFFS); + tmp &= ~FSL_SRDSCR2_SEIC_MASK; + tmp |= FSL_SRDSCR2_SEIC_PEX; + out_be32(regs + FSL_SRDSCR2_OFFS, tmp); + + /* Configure SRDSCR3 */ + tmp = FSL_SRDSCR3_SDFM_SATA_PEX; + out_be32(regs + FSL_SRDSCR3_OFFS, tmp); + + /* Configure SRDSCR4 */ + tmp = rfcks | FSL_SRDSCR4_PROT_PEX; + if (of_get_property(np, "pcie-x2", NULL)) + tmp |= FSL_SRDSCR4_PLANE_X2; + out_be32(regs + FSL_SRDSCR4_OFFS, tmp); + + } else if (!strcmp(prot, "sgmii")) { + /* Configure SRDSCR1 */ + tmp = in_be32(regs + FSL_SRDSCR1_OFFS); + tmp &= ~FSL_SRDSCR1_PLLBW; + out_be32(regs + FSL_SRDSCR1_OFFS, tmp); + + /* Configure SRDSCR2 */ + tmp = in_be32(regs + FSL_SRDSCR2_OFFS); + tmp &= ~FSL_SRDSCR2_SEIC_MASK; + tmp |= FSL_SRDSCR2_SEIC_SGMII; + out_be32(regs + FSL_SRDSCR2_OFFS, tmp); + + /* Configure SRDSCR3 */ + out_be32(regs + FSL_SRDSCR3_OFFS, 0); + + /* Configure SRDSCR4 */ + tmp = rfcks | FSL_SRDSCR4_PROT_SGMII; + out_be32(regs + FSL_SRDSCR4_OFFS, tmp); + + } else { + printk(KERN_ERR "SerDes: Wrong protocol\n"); + return -EINVAL; + } + + /* Do a software reset */ + tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS); + tmp |= FSL_SRDSRSTCTL_RST; + out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); + + printk(KERN_INFO "Freescale SerDes at %8x initialized\n", res.start); + + return 0; +} + +static int __init fsl_serdes_init(void) { + struct device_node *np; + + for (np = NULL; (np = of_find_compatible_node(np, NULL, "fsl,serdes")) != NULL;) + setup_serdes(np); + + return 0; +} + +arch_initcall(fsl_serdes_init); diff --git a/arch/powerpc/sysdev/fsl_serdes.h b/arch/powerpc/sysdev/fsl_serdes.h new file mode 100644 index 0000000..d4e5570 --- /dev/null +++ b/arch/powerpc/sysdev/fsl_serdes.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/* SerDes registers */ +#define FSL_SRDSCR0_OFFS 0x0 +#define FSL_SRDSCR0_DPP_1V2 0x00008800 +#define FSL_SRDSCR1_OFFS 0x4 +#define FSL_SRDSCR1_PLLBW 0x00000040 +#define FSL_SRDSCR2_OFFS 0x8 +#define FSL_SRDSCR2_VDD_1V2 0x00800000 +#define FSL_SRDSCR2_SEIC_MASK 0x00001c1c +#define FSL_SRDSCR2_SEIC_SATA 0x00001414 +#define FSL_SRDSCR2_SEIC_PEX 0x00001010 +#define FSL_SRDSCR2_SEIC_SGMII 0x00000101 +#define FSL_SRDSCR3_OFFS 0xc +#define FSL_SRDSCR3_KFR_SATA 0x10100000 +#define FSL_SRDSCR3_KPH_SATA 0x04040000 +#define FSL_SRDSCR3_SDFM_SATA_PEX 0x01010000 +#define FSL_SRDSCR3_SDTXL_SATA 0x00000505 +#define FSL_SRDSCR4_OFFS 0x10 +#define FSL_SRDSCR4_PROT_SATA 0x00000808 +#define FSL_SRDSCR4_PROT_PEX 0x00000101 +#define FSL_SRDSCR4_PROT_SGMII 0x00000505 +#define FSL_SRDSCR4_PLANE_X2 0x01000000 +#define FSL_SRDSCR4_RFCKS_100 0x00000000 +#define FSL_SRDSCR4_RFCKS_125 0x10000000 +#define FSL_SRDSCR4_RFCKS_150 0x30000000 +#define FSL_SRDSRSTCTL_OFFS 0x20 +#define FSL_SRDSRSTCTL_RST 0x80000000 +#define FSL_SRDSRSTCTL_SATA_RESET 0xf -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/9] add platform support for MPC837x MDS board 2007-10-10 10:06 ` [PATCH 3/9] add Freescale SerDes PHY support Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 5/9] add documentation for SATA nodes Li Yang 2007-10-11 1:05 ` [PATCH 4/9] add platform support for MPC837x MDS board Stephen Rothwell 2007-10-11 0:59 ` [PATCH 3/9] add Freescale SerDes PHY support Stephen Rothwell 1 sibling, 2 replies; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang The MPC837x MDS is a new member of Freescale MDS reference system. Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/platforms/83xx/Kconfig | 12 ++++ arch/powerpc/platforms/83xx/Makefile | 1 + arch/powerpc/platforms/83xx/mpc837x_mds.c | 102 +++++++++++++++++++++++++++++ 3 files changed, 115 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/platforms/83xx/mpc837x_mds.c diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index ec305f1..0c61e7a 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig @@ -50,6 +50,11 @@ config MPC836x_MDS help This option enables support for the MPC836x MDS Processor Board. +config MPC837x_MDS + bool "Freescale MPC837x MDS" + select DEFAULT_UIMAGE + help + This option enables support for the MPC837x MDS Processor Board. endchoice config PPC_MPC831x @@ -75,3 +80,10 @@ config PPC_MPC836x select PPC_UDBG_16550 select PPC_INDIRECT_PCI default y if MPC836x_MDS + +config PPC_MPC837x + bool + select PPC_UDBG_16550 + select PPC_INDIRECT_PCI + select FSL_SERDES + default y if MPC837x_MDS diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 5a98f88..df46629 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o +obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c new file mode 100644 index 0000000..4342173 --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c @@ -0,0 +1,102 @@ +/* + * arch/powerpc/platforms/83xx/mpc837x_mds.c + * + * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * + * MPC837x MDS board specific routines + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/pci.h> + +#include <asm/time.h> +#include <asm/ipic.h> +#include <asm/udbg.h> +#include <asm/of_platform.h> + +#include "mpc83xx.h" + +#ifndef CONFIG_PCI +unsigned long isa_io_base = 0; +unsigned long isa_mem_base = 0; +#endif + +/* ************************************************************************ + * + * Setup the architecture + * + */ +static void __init mpc837x_mds_setup_arch(void) +{ +#ifdef CONFIG_PCI + struct device_node *np; +#endif + + if (ppc_md.progress) + ppc_md.progress("mpc837x_mds_setup_arch()", 0); + +#ifdef CONFIG_PCI + for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) + mpc83xx_add_bridge(np); +#endif +} + +static struct of_device_id mpc837x_ids[] = { + { .type = "soc", }, + { .compatible = "soc", }, + {}, +}; + +static int __init mpc837x_declare_of_platform_devices(void) +{ + if (!machine_is(mpc837x_mds)) + return 0; + + /* Publish of_device */ + of_platform_bus_probe(NULL, mpc837x_ids, NULL); + + return 0; +} +device_initcall(mpc837x_declare_of_platform_devices); + +static void __init mpc837x_mds_init_IRQ(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "fsl,ipic"); + if (!np) + return; + + ipic_init(np, 0); + + /* Initialize the default interrupt mapping priorities, + * in case the boot rom changed something on us. + */ + ipic_set_default_priority(); +} + +/* + * Called very early, MMU is off, device-tree isn't unflattened + */ +static int __init mpc837x_mds_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "fsl,mpc837xmds"); +} + +define_machine(mpc837x_mds) { + .name = "MPC837x MDS", + .probe = mpc837x_mds_probe, + .setup_arch = mpc837x_mds_setup_arch, + .init_IRQ = mpc837x_mds_init_IRQ, + .get_irq = ipic_get_irq, + .restart = mpc83xx_restart, + .time_init = mpc83xx_time_init, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 5/9] add documentation for SATA nodes 2007-10-10 10:06 ` [PATCH 4/9] add platform support for MPC837x MDS board Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 6/9] add documentation for SerDes nodes Li Yang 2007-10-11 1:05 ` [PATCH 4/9] add platform support for MPC837x MDS board Stephen Rothwell 1 sibling, 1 reply; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang Signed-off-by: Li Yang <leoli@freescale.com> --- Documentation/powerpc/booting-without-of.txt | 32 ++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 76733a3..f499f76 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -1824,6 +1824,38 @@ platforms are moved over to use the flattened-device-tree model. fsl,has-rstcr; }; + l) SATA nodes + + SATA nodes are defined to describe on-chip Serial ATA controllers. + + Required properties: + + - compatible : Should specify what this SATA controller is compatible + with. + - reg : Offset and length of the register set for the device. + - interrupts : <a b> where a is the interrupt number and b is a + field that represents an encoding of the sense and level + information for the interrupt. This should be encoded based on + the information in section 2) depending on the type of interrupt + controller you have. + - interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. + + Recommended properties : + + - phy-handle : Some SATA controller uses a shared SerDes PHY. This + property should specify the phandle of the SerDes node. + + Example: + + sata@19000 { + compatible = "fsl,mpc8315-sata"; + reg = <19000 1000>; + interrupts = <2d 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes1 >; + }; + More devices will be defined as this spec matures. VII - Specifying interrupt information for devices -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 6/9] add documentation for SerDes nodes 2007-10-10 10:06 ` [PATCH 5/9] add documentation for SATA nodes Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 7/9] ipic: clean up unsupported ack operations Li Yang 0 siblings, 1 reply; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang Signed-off-by: Li Yang <leoli@freescale.com> --- Documentation/powerpc/booting-without-of.txt | 29 ++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index f499f76..84bce42 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -1856,6 +1856,35 @@ platforms are moved over to use the flattened-device-tree model. phy-handle = < &serdes1 >; }; + m) SerDes nodes + + SerDes is a serializer/deserializer used by some Freescale SoC. + + Required properties: + + - compatible : Should specify what this SerDes controller is compatible + with. Currently, this is most likely to be "fsl,serdes". + - reg : Offset and length of the register set for the device. + - protocol : Which up layer protocol is running on the serial + interface. Could be "sata", "pcie", "sgmii". + - clock : Input clock frequency for SerDes in unit of MHz. + + Optional properties: + + - vdd-1v : Define this property when Vdd is 1V. + - pcie-x2 : Define this property when using PCI Express x2 interface. + Valid only when protocol is set to "pcie". + + Example: + + serdes1:serdes@e3000 { + compatible = "fsl,serdes"; + reg = <e3000 100>; + vdd-1v; + protocol = "sata"; + clock = <d#100>; + }; + More devices will be defined as this spec matures. VII - Specifying interrupt information for devices -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 7/9] ipic: clean up unsupported ack operations 2007-10-10 10:06 ` [PATCH 6/9] add documentation for SerDes nodes Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 8/9] add MPC837x MDS default kernel configuration Li Yang 0 siblings, 1 reply; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang IPIC controller doesn't support ack operations. The pending registers are read-only. The patch removes ack operations which are not needed. Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/sysdev/ipic.c | 40 ++-------------------------------------- 1 files changed, 2 insertions(+), 38 deletions(-) diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index ea4f695..b814a04 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -533,42 +533,7 @@ static void ipic_mask_irq(unsigned int virq) temp = ipic_read(ipic->regs, ipic_info[src].mask); temp &= ~(1 << (31 - ipic_info[src].bit)); ipic_write(ipic->regs, ipic_info[src].mask, temp); - - spin_unlock_irqrestore(&ipic_lock, flags); -} - -static void ipic_ack_irq(unsigned int virq) -{ - struct ipic *ipic = ipic_from_irq(virq); - unsigned int src = ipic_irq_to_hw(virq); - unsigned long flags; - u32 temp; - - spin_lock_irqsave(&ipic_lock, flags); - - temp = ipic_read(ipic->regs, ipic_info[src].pend); - temp |= (1 << (31 - ipic_info[src].bit)); - ipic_write(ipic->regs, ipic_info[src].pend, temp); - - spin_unlock_irqrestore(&ipic_lock, flags); -} - -static void ipic_mask_irq_and_ack(unsigned int virq) -{ - struct ipic *ipic = ipic_from_irq(virq); - unsigned int src = ipic_irq_to_hw(virq); - unsigned long flags; - u32 temp; - - spin_lock_irqsave(&ipic_lock, flags); - - temp = ipic_read(ipic->regs, ipic_info[src].mask); - temp &= ~(1 << (31 - ipic_info[src].bit)); - ipic_write(ipic->regs, ipic_info[src].mask, temp); - - temp = ipic_read(ipic->regs, ipic_info[src].pend); - temp |= (1 << (31 - ipic_info[src].bit)); - ipic_write(ipic->regs, ipic_info[src].pend, temp); + mb(); spin_unlock_irqrestore(&ipic_lock, flags); } @@ -626,8 +591,7 @@ static struct irq_chip ipic_irq_chip = { .typename = " IPIC ", .unmask = ipic_unmask_irq, .mask = ipic_mask_irq, - .mask_ack = ipic_mask_irq_and_ack, - .ack = ipic_ack_irq, + .mask_ack = ipic_mask_irq, .set_type = ipic_set_irq_type, }; -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 8/9] add MPC837x MDS default kernel configuration 2007-10-10 10:06 ` [PATCH 7/9] ipic: clean up unsupported ack operations Li Yang @ 2007-10-10 10:06 ` Li Yang 2007-10-10 10:06 ` [PATCH 9/9] add MPC837x MDS board default device tree Li Yang 0 siblings, 1 reply; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/configs/mpc837x_mds_defconfig | 878 ++++++++++++++++++++++++++++ 1 files changed, 878 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/configs/mpc837x_mds_defconfig diff --git a/arch/powerpc/configs/mpc837x_mds_defconfig b/arch/powerpc/configs/mpc837x_mds_defconfig new file mode 100644 index 0000000..4f49aee --- /dev/null +++ b/arch/powerpc/configs/mpc837x_mds_defconfig @@ -0,0 +1,878 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.23 +# Wed Oct 10 16:31:39 2007 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_83xx=y +CONFIG_PPC_FPU=y +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_PPC32=y +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_IRQ_PER_CPU=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +# CONFIG_EPOLL is not set +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# Platform support +# +# CONFIG_PPC_MULTIPLATFORM is not set +# CONFIG_EMBEDDED6xx is not set +# CONFIG_PPC_82xx is not set +CONFIG_PPC_83xx=y +# CONFIG_PPC_86xx is not set +# CONFIG_PPC_MPC52xx is not set +# CONFIG_PPC_MPC5200 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +# CONFIG_MPC8313_RDB is not set +# CONFIG_MPC832x_MDS is not set +# CONFIG_MPC832x_RDB is not set +# CONFIG_MPC834x_MDS is not set +# CONFIG_MPC834x_ITX is not set +# CONFIG_MPC836x_MDS is not set +CONFIG_MPC837x_MDS=y +CONFIG_PPC_MPC837x=y +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_CPM2 is not set +# CONFIG_FSL_ULI1575 is not set +CONFIG_FSL_SERDES=y + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y +CONFIG_HIBERNATION_UP_POSSIBLE=y +CONFIG_SECCOMP=y +CONFIG_WANT_DEVICE_TREE=y +CONFIG_DEVICE_TREE="" +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +# CONFIG_PCI is not set +# CONFIG_PCI_DOMAINS is not set +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_HIGHMEM_START=0xfe000000 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_TASK_SIZE=0x80000000 +CONFIG_BOOT_LOAD=0x00800000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +CONFIG_OF_DEVICE=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_FSL=y +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=y +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_NETDEV_1000=y +CONFIG_GIANFAR=y +# CONFIG_GFAR_NAPI is not set +CONFIG_NETDEV_10000=y + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_OF_PLATFORM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_83xx_WDT=y +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +CONFIG_GEN_RTC=y +# CONFIG_GEN_RTC_X is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_MPC=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_M41T00 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ABITUGURU3 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +CONFIG_DAB=y + +# +# Graphics support +# +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=m +# CONFIG_FB is not set +# CONFIG_FB_IBM_GXT4500 is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_EDAC is not set +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# Userspace I/O +# +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set +# CONFIG_UCC_SLOW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y + +# +# Instrumentation Support +# +# CONFIG_PROFILING is not set +# CONFIG_KPROBES is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_HW=y -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 9/9] add MPC837x MDS board default device tree 2007-10-10 10:06 ` [PATCH 8/9] add MPC837x MDS default kernel configuration Li Yang @ 2007-10-10 10:06 ` Li Yang 0 siblings, 0 replies; 12+ messages in thread From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw) To: galak, paulus, linuxppc-dev; +Cc: Li Yang Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/boot/dts/mpc8377_mds.dts | 288 ++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8378_mds.dts | 268 ++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8379_mds.dts | 308 +++++++++++++++++++++++++++++++++ 3 files changed, 864 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/mpc8377_mds.dts create mode 100644 arch/powerpc/boot/dts/mpc8378_mds.dts create mode 100644 arch/powerpc/boot/dts/mpc8379_mds.dts diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts new file mode 100644 index 0000000..8530de6 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -0,0 +1,288 @@ +/* + * MPC8377E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "fsl,mpc8377emds"; + compatible = "fsl,mpc8377emds","fsl,mpc837xmds"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,837x@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; + i-cache-line-size = <20>; + d-cache-size = <8000>; // L1, 32K + i-cache-size = <8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 20000000>; // 512MB at 0 + }; + + soc837x@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <e 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = <f 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + device_type = "spi"; + compatible = "mpc83xx_spi"; + reg = <7000 1000>; + interrupts = <10 8>; + interrupt-parent = < &ipic >; + mode = <0>; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + device_type = "usb"; + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + #address-cells = <1>; + #size-cells = <0>; + phy2: ethernet-phy@2 { + interrupt-parent = < &ipic >; + interrupts = <11 8>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = < &ipic >; + interrupts = <12 8>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <20 8 21 8 22 8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy2 >; + }; + + ethernet@25000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <23 8 24 8 25 8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy3 >; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = < &ipic >; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = <a 8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC3"; + compatible = "talitos"; + reg = <30000 10000>; + interrupts = <b 8>; + interrupt-parent = < &ipic >; + /* Rev. 3.0 geometry */ + num-channels = <4>; + channel-fifo-len = <18>; + exec-units-mask = <000009fe>; + descriptor-types-mask = <03ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <2e000 1000>; + interrupts = <2a 8>; + interrupt-parent = < &ipic >; + }; + + sata@18000 { + device_type = "sata"; + model = "SATA-300"; + compatible = "fsl,mpc8379-sata"; + reg = <18000 1000>; + interrupts = <2c 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes1 >; + }; + + sata@19000 { + device_type = "sata"; + model = "SATA-300"; + compatible = "fsl,mpc8379-sata"; + reg = <19000 1000>; + interrupts = <2d 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes1 >; + }; + + serdes1:serdes@e3000 { + compatible = "fsl,serdes"; + reg = <e3000 100>; + vdd-1v; + protocol = "sata"; + clock = <d#100>; + }; + + serdes2:serdes@e3100 { + compatible = "fsl,serdes"; + reg = <e3100 100>; + vdd-1v; + protocol = "pcie"; + clock = <d#100>; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + }; + }; + + pci@e0008500 { + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + + /* IDSEL 0x11 */ + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 + + /* IDSEL 0x12 */ + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 + + /* IDSEL 0x13 */ + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 + + /* IDSEL 0x15 */ + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 + + /* IDSEL 0x16 */ + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 + + /* IDSEL 0x17 */ + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 + + /* IDSEL 0x18 */ + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; + interrupts = <42 8>; + bus-range = <0 0>; + ranges = <02000000 0 90000000 90000000 0 10000000 + 42000000 0 80000000 80000000 0 10000000 + 01000000 0 00000000 e2000000 0 00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <e0008500 100>; + compatible = "fsl,mpc83xx-pci", "83xx"; + device_type = "pci"; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts new file mode 100644 index 0000000..340df76 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts @@ -0,0 +1,268 @@ +/* + * MPC8378E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "fsl,mpc8378emds"; + compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,837x@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; + i-cache-line-size = <20>; + d-cache-size = <8000>; // L1, 32K + i-cache-size = <8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 20000000>; // 512MB at 0 + }; + + soc837x@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <e 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = <f 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + device_type = "spi"; + compatible = "mpc83xx_spi"; + reg = <7000 1000>; + interrupts = <10 8>; + interrupt-parent = < &ipic >; + mode = <0>; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + device_type = "usb"; + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + #address-cells = <1>; + #size-cells = <0>; + phy2: ethernet-phy@2 { + interrupt-parent = < &ipic >; + interrupts = <11 8>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = < &ipic >; + interrupts = <12 8>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <20 8 21 8 22 8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy2 >; + }; + + ethernet@25000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <23 8 24 8 25 8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy3 >; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = < &ipic >; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = <a 8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC3"; + compatible = "talitos"; + reg = <30000 10000>; + interrupts = <b 8>; + interrupt-parent = < &ipic >; + /* Rev. 3.0 geometry */ + num-channels = <4>; + channel-fifo-len = <18>; + exec-units-mask = <000009fe>; + descriptor-types-mask = <03ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <2e000 1000>; + interrupts = <2a 8>; + interrupt-parent = < &ipic >; + }; + + serdes1:serdes@e3000 { + compatible = "fsl,serdes"; + reg = <e3000 100>; + vdd-1v; + protocol = "sgmii"; + clock = <d#100>; + }; + + serdes2:serdes@e3100 { + compatible = "fsl,serdes"; + reg = <e3100 100>; + vdd-1v; + protocol = "pcie"; + clock = <d#100>; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + }; + }; + + pci@e0008500 { + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + + /* IDSEL 0x11 */ + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 + + /* IDSEL 0x12 */ + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 + + /* IDSEL 0x13 */ + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 + + /* IDSEL 0x15 */ + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 + + /* IDSEL 0x16 */ + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 + + /* IDSEL 0x17 */ + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 + + /* IDSEL 0x18 */ + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; + interrupts = <42 8>; + bus-range = <0 0>; + ranges = <02000000 0 90000000 90000000 0 10000000 + 42000000 0 80000000 80000000 0 10000000 + 01000000 0 00000000 e2000000 0 00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <e0008500 100>; + compatible = "fsl,mpc83xx-pci", "83xx"; + device_type = "pci"; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts new file mode 100644 index 0000000..4a9b3f0 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts @@ -0,0 +1,308 @@ +/* + * MPC8379E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "fsl,mpc8379emds"; + compatible = "fsl,mpc8379emds","fsl,mpc837xmds"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,837x@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; + i-cache-line-size = <20>; + d-cache-size = <8000>; // L1, 32K + i-cache-size = <8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 20000000>; // 512MB at 0 + }; + + soc837x@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <e 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = <f 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + device_type = "spi"; + compatible = "mpc83xx_spi"; + reg = <7000 1000>; + interrupts = <10 8>; + interrupt-parent = < &ipic >; + mode = <0>; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + device_type = "usb"; + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + #address-cells = <1>; + #size-cells = <0>; + phy2: ethernet-phy@2 { + interrupt-parent = < &ipic >; + interrupts = <11 8>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = < &ipic >; + interrupts = <12 8>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <20 8 21 8 22 8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy2 >; + }; + + ethernet@25000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <23 8 24 8 25 8>; + phy-connection-type = "mii"; + interrupt-parent = < &ipic >; + phy-handle = < &phy3 >; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = < &ipic >; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = <a 8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC3"; + compatible = "talitos"; + reg = <30000 10000>; + interrupts = <b 8>; + interrupt-parent = < &ipic >; + /* Rev. 3.0 geometry */ + num-channels = <4>; + channel-fifo-len = <18>; + exec-units-mask = <000009fe>; + descriptor-types-mask = <03ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <2e000 1000>; + interrupts = <2a 8>; + interrupt-parent = < &ipic >; + }; + + sata@18000 { + device_type = "sata"; + model = "SATA-300"; + compatible = "fsl,mpc8379-sata"; + reg = <18000 1000>; + interrupts = <2c 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes1 >; + }; + + sata@19000 { + device_type = "sata"; + model = "SATA-300"; + compatible = "fsl,mpc8379-sata"; + reg = <19000 1000>; + interrupts = <2d 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes1 >; + }; + + sata@1a000 { + device_type = "sata"; + model = "SATA-300"; + compatible = "fsl,mpc8379-sata"; + reg = <1a000 1000>; + interrupts = <2e 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes2 >; + }; + + sata@1b000 { + device_type = "sata"; + model = "SATA-300"; + compatible = "fsl,mpc8379-sata"; + reg = <1b000 1000>; + interrupts = <2f 8>; + interrupt-parent = < &ipic >; + phy-handle = < &serdes2 >; + }; + + serdes1:serdes@e3000 { + compatible = "fsl,serdes"; + reg = <e3000 100>; + vdd-1v; + protocol = "sata"; + clock = <d#100>; + }; + + serdes2:serdes@e3100 { + compatible = "fsl,serdes"; + reg = <e3100 100>; + vdd-1v; + protocol = "sata"; + clock = <d#100>; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + compatible = "fsl,ipic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + }; + }; + + pci@e0008500 { + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + + /* IDSEL 0x11 */ + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 + + /* IDSEL 0x12 */ + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 + + /* IDSEL 0x13 */ + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 + + /* IDSEL 0x15 */ + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 + + /* IDSEL 0x16 */ + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 + + /* IDSEL 0x17 */ + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 + + /* IDSEL 0x18 */ + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; + interrupts = <42 8>; + bus-range = <0 0>; + ranges = <02000000 0 90000000 90000000 0 10000000 + 42000000 0 80000000 80000000 0 10000000 + 01000000 0 00000000 e2000000 0 00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <e0008500 100>; + compatible = "fsl,mpc83xx-pci", "83xx"; + device_type = "pci"; + }; +}; -- 1.5.3.2.104.g41ef ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 4/9] add platform support for MPC837x MDS board 2007-10-10 10:06 ` [PATCH 4/9] add platform support for MPC837x MDS board Li Yang 2007-10-10 10:06 ` [PATCH 5/9] add documentation for SATA nodes Li Yang @ 2007-10-11 1:05 ` Stephen Rothwell 2007-10-11 7:28 ` Li Yang-r58472 1 sibling, 1 reply; 12+ messages in thread From: Stephen Rothwell @ 2007-10-11 1:05 UTC (permalink / raw) To: Li Yang; +Cc: linuxppc-dev, paulus [-- Attachment #1: Type: text/plain, Size: 372 bytes --] On Wed, 10 Oct 2007 18:06:39 +0800 Li Yang <leoli@freescale.com> wrote: > > +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c > > +#include <asm/of_platform.h> You actually neeed linux/of.h (for of_ routines) and asm/prom.h (for of_flat_dt_is_compatible). -- Cheers, Stephen Rothwell sfr@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ [-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH 4/9] add platform support for MPC837x MDS board 2007-10-11 1:05 ` [PATCH 4/9] add platform support for MPC837x MDS board Stephen Rothwell @ 2007-10-11 7:28 ` Li Yang-r58472 0 siblings, 0 replies; 12+ messages in thread From: Li Yang-r58472 @ 2007-10-11 7:28 UTC (permalink / raw) To: Stephen Rothwell; +Cc: linuxppc-dev, paulus > -----Original Message----- > From: Stephen Rothwell [mailto:sfr@canb.auug.org.au]=20 > Sent: Thursday, October 11, 2007 9:06 AM > To: Li Yang-r58472 > Cc: galak@kernel.crashing.org; paulus@samba.org;=20 > linuxppc-dev@ozlabs.org > Subject: Re: [PATCH 4/9] add platform support for MPC837x MDS board >=20 > On Wed, 10 Oct 2007 18:06:39 +0800 Li Yang=20 > <leoli@freescale.com> wrote: > > > > +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c > > > > +#include <asm/of_platform.h> >=20 > You actually neeed linux/of.h (for of_ routines) and=20 > asm/prom.h (for of_flat_dt_is_compatible). Thanks for the comments. Updated version on the way. - Leo ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/9] add Freescale SerDes PHY support 2007-10-10 10:06 ` [PATCH 3/9] add Freescale SerDes PHY support Li Yang 2007-10-10 10:06 ` [PATCH 4/9] add platform support for MPC837x MDS board Li Yang @ 2007-10-11 0:59 ` Stephen Rothwell 1 sibling, 0 replies; 12+ messages in thread From: Stephen Rothwell @ 2007-10-11 0:59 UTC (permalink / raw) To: Li Yang; +Cc: linuxppc-dev, paulus [-- Attachment #1: Type: text/plain, Size: 303 bytes --] On Wed, 10 Oct 2007 18:06:38 +0800 Li Yang <leoli@freescale.com> wrote: > > +++ b/arch/powerpc/sysdev/fsl_serdes.c > > +#include <asm/prom.h> You actually want linux/of.h not asm/prom.h -- Cheers, Stephen Rothwell sfr@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ [-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2007-10-11 7:29 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2007-10-10 10:06 [PATCH 1/9] add e300c4 entry to cputable Li Yang 2007-10-10 10:06 ` [PATCH 2/9] ipic: add new interrupts introduced by new chip Li Yang 2007-10-10 10:06 ` [PATCH 3/9] add Freescale SerDes PHY support Li Yang 2007-10-10 10:06 ` [PATCH 4/9] add platform support for MPC837x MDS board Li Yang 2007-10-10 10:06 ` [PATCH 5/9] add documentation for SATA nodes Li Yang 2007-10-10 10:06 ` [PATCH 6/9] add documentation for SerDes nodes Li Yang 2007-10-10 10:06 ` [PATCH 7/9] ipic: clean up unsupported ack operations Li Yang 2007-10-10 10:06 ` [PATCH 8/9] add MPC837x MDS default kernel configuration Li Yang 2007-10-10 10:06 ` [PATCH 9/9] add MPC837x MDS board default device tree Li Yang 2007-10-11 1:05 ` [PATCH 4/9] add platform support for MPC837x MDS board Stephen Rothwell 2007-10-11 7:28 ` Li Yang-r58472 2007-10-11 0:59 ` [PATCH 3/9] add Freescale SerDes PHY support Stephen Rothwell
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