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From: Li Li <r64360@freescale.com>
To: benh@kernel.crashing.org
Cc: linuxppc-dev <linuxppc-dev@ozlabs.org>,
	Gala Kumar <kumar.gala@freescale.com>,
	Li Tony <Tony.Li@freescale.com>
Subject: Re: [PATCH] Add IPIC MSI interrupt support
Date: Tue, 04 Dec 2007 09:41:50 +0800	[thread overview]
Message-ID: <1196732510.2910.3.camel@Guyver> (raw)
In-Reply-To: <1196715812.13230.234.camel@pasglop>

On Tue, 2007-12-04 at 05:03 +0800, Benjamin Herrenschmidt wrote:
> 
> On Mon, 2007-12-03 at 17:07 +0800, Li Li wrote: 
> > 
> > In IPIC, the 8 MSI interrupts is handled as level intrrupt. 
> > I just provide a versatile in case it is changed.
> 
> Level ? Are you sure ? MSIs are by definition edge interrupts... Or
> do 
> you have some weird logic that asserts a level input until you go ack 
> something ? Sounds weird...
> 

The second one.
The MSI is edge interrupt. The 256 MSI interrupts are divided into 8
groups. Each group can generate a interrupt to core. This interrupts are
level and asserted untile ack MSI interrupt. A little weird.

> Ben.
> 
> 

- Tony

  reply	other threads:[~2007-12-04  1:52 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-11-30  3:48 [PATCH] Add IPIC MSI interrupt support Li Li
2007-12-03  1:52 ` David Gibson
2007-12-03  4:59   ` Li Li
2007-12-03  4:02 ` Michael Ellerman
2007-12-03  9:07   ` Li Li
2007-12-03 21:03     ` Benjamin Herrenschmidt
2007-12-04  1:41       ` Li Li [this message]
2007-12-04  5:38     ` Michael Ellerman
2007-12-04  7:51       ` Benjamin Herrenschmidt
2007-12-04  9:10         ` Li Li
2007-12-04 10:34       ` Li Tony
2007-12-04 12:04         ` Michael Ellerman
2007-12-04 13:13           ` Scott Wood

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