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Subject: Re: [PATCH] Add IPIC MSI interrupt support
From: Li Li <r64360@freescale.com>
To: benh@kernel.crashing.org
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Date: Tue, 04 Dec 2007 09:41:50 +0800
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Cc: linuxppc-dev <linuxppc-dev@ozlabs.org>,
	Gala Kumar <kumar.gala@freescale.com>, Li Tony <Tony.Li@freescale.com>
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On Tue, 2007-12-04 at 05:03 +0800, Benjamin Herrenschmidt wrote:
> 
> On Mon, 2007-12-03 at 17:07 +0800, Li Li wrote: 
> > 
> > In IPIC, the 8 MSI interrupts is handled as level intrrupt. 
> > I just provide a versatile in case it is changed.
> 
> Level ? Are you sure ? MSIs are by definition edge interrupts... Or
> do 
> you have some weird logic that asserts a level input until you go ack 
> something ? Sounds weird...
> 

The second one.
The MSI is edge interrupt. The 256 MSI interrupts are divided into 8
groups. Each group can generate a interrupt to core. This interrupts are
level and asserted untile ack MSI interrupt. A little weird.

> Ben.
> 
> 

- Tony