From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from moutng.kundenserver.de (moutng.kundenserver.de [212.227.126.179]) by ozlabs.org (Postfix) with ESMTP id EA6AFDDDE7 for ; Mon, 10 Dec 2007 18:43:33 +1100 (EST) From: Stefan Roese To: linuxppc-dev@ozlabs.org Subject: [PATCH] [POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe driver Date: Mon, 10 Dec 2007 08:37:34 +0100 Message-Id: <1197272254-11691-1-git-send-email-sr@denx.de> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This patch adds runtime detection of the 440SPe revision A chips. These chips are equipped with a slighly different PCIe core and need special/ different initialization. The compatible node is changed to "plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that can be equipped with both PPC revisions like the AMCC Yucca. Signed-off-by: Stefan Roese --- arch/powerpc/boot/dts/katmai.dts | 6 +++--- arch/powerpc/sysdev/ppc4xx_pci.c | 25 +++++++++++++++++-------- 2 files changed, 20 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index 2bea84f..824cf4e 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts @@ -269,7 +269,7 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - compatible = "ibm,plb-pciex-440speB", "ibm,plb-pciex"; + compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; primary; port = <0>; /* port number */ reg = ; #size-cells = <2>; #address-cells = <3>; - compatible = "ibm,plb-pciex-440speB", "ibm,plb-pciex"; + compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; primary; port = <1>; /* port number */ reg = ; #size-cells = <2>; #address-cells = <3>; - compatible = "ibm,plb-pciex-440speB", "ibm,plb-pciex"; + compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; primary; port = <2>; /* port number */ reg = sdr_base + PESDRn_DLPSET, val); mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, 0x20222222); - if (of_device_is_compatible(port->node, "ibm,plb-pciex-440speA")) + if (ppc440spe_revA()) mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x11000000); mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL0SET1, 0x35000000); mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL1SET1, 0x35000000); @@ -772,7 +780,6 @@ static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata = .setup_utl = ppc440speB_pciex_init_utl, }; - #endif /* CONFIG_44x */ #ifdef CONFIG_40x @@ -888,10 +895,12 @@ static int __init ppc4xx_pciex_check_core_init(struct device_node *np) return 0; #ifdef CONFIG_44x - if (of_device_is_compatible(np, "ibm,plb-pciex-440speA")) - ppc4xx_pciex_hwops = &ppc440speA_pcie_hwops; - else if (of_device_is_compatible(np, "ibm,plb-pciex-440speB")) - ppc4xx_pciex_hwops = &ppc440speB_pcie_hwops; + if (of_device_is_compatible(np, "ibm,plb-pciex-440spe")) { + if (ppc440spe_revA()) + ppc4xx_pciex_hwops = &ppc440speA_pcie_hwops; + else + ppc4xx_pciex_hwops = &ppc440speB_pcie_hwops; + } #endif /* CONFIG_44x */ #ifdef CONFIG_40x if (of_device_is_compatible(np, "ibm,plb-pciex-405ex")) -- 1.5.3.7.949.g2221a6