From: Stefan Roese <sr@denx.de>
To: linuxppc-dev@ozlabs.org
Subject: [PATCH 2/2 v2] [POWERPC] Add L2 cache node to AMCC Taishan dts file
Date: Sat, 22 Mar 2008 11:29:14 +0100 [thread overview]
Message-ID: <1206181754-21830-1-git-send-email-sr@denx.de> (raw)
This patch adds the L2 cache node to the Taishan 440GX dts file.
Signed-off-by: Stefan Roese <sr@denx.de>
---
Unit address removed.
arch/powerpc/boot/dts/taishan.dts | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
index 8278068..d0bff33 100644
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -104,6 +104,16 @@
// FIXME: anything else?
};
+ L2C0: l2c {
+ compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
+ dcr-reg = <20 8 /* Internal SRAM DCR's */
+ 30 8>; /* L2 cache DCR's */
+ cache-line-size = <20>; /* 32 bytes */
+ cache-size = <40000>; /* L2, 256K */
+ interrupt-parent = <&UIC2>;
+ interrupts = <17 1>;
+ };
+
plb {
compatible = "ibm,plb-440gx", "ibm,plb4";
#address-cells = <2>;
--
1.5.4.4
reply other threads:[~2008-03-22 10:32 UTC|newest]
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