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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Corey Ashford <cjashfor@us.ibm.com>
Cc: Olof Johansson <olof@lixom.net>, linuxppc-dev@ozlabs.org
Subject: Re: Feedback requested on switching the exception wrapper used for the PMU interrupt on ppc64
Date: Wed, 14 May 2008 23:46:07 -0700	[thread overview]
Message-ID: <1210833967.8297.76.camel@pasglop> (raw)
In-Reply-To: <482A158A.2010005@us.ibm.com>


On Tue, 2008-05-13 at 15:26 -0700, Corey Ashford wrote:
> The perfmon2 code is available here: 
> http://sourceforge.net/project/showfiles.php?group_id=144822
> 
> perfmon2's interrupt handler does have a single entry point.  Could I 
> somehow mimic what the MASKABLE_EXCEPTION_PSERIES macro does inside
> of 
> the perfmon2 interrupt handler?  Are there examples of this I can look
> at?
> 
> That would give us the best of both worlds.

You can definitely snapshot as many data as you can, and if interrupts
are soft-disabled, just return to the caller, storing that snapshot in
some per-cpu data structure.

You can then add something to local_irq_restore() that checks whether
some perfmon2 stuff happened and does the actual storing of the data
that were previously collected.

Cheers,
Ben.

  reply	other threads:[~2008-05-15  6:46 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <OFDA580598.87E2E65B-ON87257448.007AA3F0-88257448.007AB1E1@us.ibm.com>
2008-05-13 22:26 ` Feedback requested on switching the exception wrapper used for the PMU interrupt on ppc64 Corey Ashford
2008-05-15  6:46   ` Benjamin Herrenschmidt [this message]
2008-05-15 19:41     ` Corey J Ashford
2008-05-15 22:36       ` Corey J Ashford
2008-05-15 23:36       ` Paul Mackerras
2008-05-16  0:26         ` Corey J Ashford
2008-05-16  1:02           ` Paul Mackerras
2008-05-16  2:04             ` Corey J Ashford
2008-05-16 21:25             ` Corey J Ashford
2008-05-13 22:05 Corey Ashford
2008-05-13 22:13 ` Olof Johansson

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