From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4C6CCDE025 for ; Wed, 28 May 2008 07:13:08 +1000 (EST) Subject: Re: MMIO and gcc re-ordering issue From: Benjamin Herrenschmidt To: Linus Torvalds In-Reply-To: References: <1211852026.3286.36.camel@pasglop> <20080526.184047.88207142.davem@davemloft.net> <1211854540.3286.42.camel@pasglop> <20080526.192812.184590464.davem@davemloft.net> <1211859542.3286.46.camel@pasglop> Content-Type: text/plain Date: Wed, 28 May 2008 07:12:46 +1000 Message-Id: <1211922766.3286.84.camel@pasglop> Mime-Version: 1.0 Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, tpiepho@freescale.com, linuxppc-dev@ozlabs.org, scottwood@freescale.com, David Miller , alan@lxorguk.ukuu.org.uk Reply-To: benh@kernel.crashing.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, 2008-05-27 at 09:47 -0700, Linus Torvalds wrote: > > __read[bwlq]()/__write[bwlq]() are not serialized with a :"memory" > barrier, although since they still use "asm volatile" I suspect that > i > practice they are probably serial too. Did not look very closely at > any > generated code (only did a trivial test to see that the code looks > *roughly* correct). Nah, asm volatile doesn't help, it does need the "memory" clobber too. Cheers, Ben.