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From: Hollis Blanchard <hollisb@us.ibm.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org, yanok@emcraft.com,
	kvm-ppc@vger.kernel.org, dwg@au1.ibm.com
Subject: Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way
Date: Wed, 12 Nov 2008 09:11:25 -0600	[thread overview]
Message-ID: <1226502685.19156.2.camel@localhost.localdomain> (raw)
In-Reply-To: <1226490730.7154.16.camel@pasglop>

On Wed, 2008-11-12 at 22:52 +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2008-11-12 at 06:31 -0500, Josh Boyer wrote:
> > On Wed, 12 Nov 2008 15:37:43 +1100
> > Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> > 
> > > On Tue, 2008-11-11 at 18:06 -0600, Hollis Blanchard wrote:
> > > > The current CHIP11 errata truncates the device tree memory node, and subtracts
> > > > (hardcoded) 4096 bytes. This breaks kernels with larger PAGE_SIZE, since the
> > > > bootmem allocator assumes that total memory is a multiple of PAGE_SIZE.
> > > > 
> > > > Instead, use a device tree memory reservation to reserve only the 256 bytes
> > > > actually affected by the errata, leaving the total memory size unaltered.
> > > > 
> > > > Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
> > > 
> > > While I prefer this approach, won't it break kexec ?
> > 
> > Break it how?  Particularly given that kexec doesn't work on 4xx (yet).
> 
> Allright, wrong wording. It will make kexec more painful since it will
> have to also create that reserved area in the target DT.
> 
> > I don't think that's it.  I think it's more that we're opportunistic and
> > the wrapper is the easiest place to do this, given that U-Boot itself
> > will be doing the reserve for platforms that don't require the
> > wrapper.
> > 
> > So we could do the fixup in-kernel, but how do you do that
> > deterministically given that U-Boot might have already done it?
> 
> Bah, do you know many RAM chip that will chop off the last 4K ?

Forget pages. The errata is about the last 256 bytes of physical memory.

> I still find it a bit tricky to have memory nodes not aligned on nice
> fat big boundaries tho.

I don't know what you're referring to. The patch I sent doesn't touch
memory nodes, so they are indeed still aligned on nice fat big
boundaries.

I don't think this is overengineering at all. We can't touch the last
256 bytes, so we mark it reserved, and then we won't. Altering memory
nodes is far more complicated and error-prone.

-- 
Hollis Blanchard
IBM Linux Technology Center

  reply	other threads:[~2008-11-12 15:11 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-11-12  0:06 [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way Hollis Blanchard
2008-11-12  0:09 ` David Gibson
2008-11-12  4:37 ` Benjamin Herrenschmidt
2008-11-12 11:31   ` Josh Boyer
2008-11-12 11:52     ` Benjamin Herrenschmidt
2008-11-12 15:11       ` Hollis Blanchard [this message]
2008-11-12 20:44         ` Benjamin Herrenschmidt
2008-11-12 20:53           ` Josh Boyer
2008-11-13 19:54           ` Hollis Blanchard
  -- strict thread matches above, loose matches on Subject: below --
2008-11-14 17:25 Milton Miller
2008-11-14 17:29 ` Milton Miller
2008-11-14 22:09   ` Hollis Blanchard
2008-11-18 20:33     ` Hollis Blanchard
2008-11-24 20:07     ` Hollis Blanchard
2008-11-25  0:10       ` Michael Ellerman
2008-11-25 17:10         ` Milton Miller
2008-11-25 21:17           ` Hollis Blanchard
2008-11-25 21:53         ` Hollis Blanchard
2008-11-25 23:43           ` Michael Ellerman

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