* PCI Resource allocation
@ 2008-12-04 18:36 Deepak Pandian
2008-12-04 22:54 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 7+ messages in thread
From: Deepak Pandian @ 2008-12-04 18:36 UTC (permalink / raw)
To: linuxppc-dev
Hi,
In ppc4xx_pci i see the pci size to be declared as
u32 lah, lal, pciah, pcial, sa;
Also at many other places I see the pci region is not capable of
handling resources > 4GB. I am planning to work on this arch specific
code to make it handle pci resource of width greater than 4 GB.
But before that i wanted to clarify whether the core kernel will be
able to handle pci regions with width greater than 4GB.
--
With Regards,
Deepak Pandian
"Time is precious,One day we will find that we have less than what we
think" -RandyPausch
www.peerlessdeepak.wordpress.com
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: PCI Resource allocation
2008-12-04 18:36 PCI Resource allocation Deepak Pandian
@ 2008-12-04 22:54 ` Benjamin Herrenschmidt
2008-12-05 0:12 ` Flores, Raul
2008-12-05 3:40 ` Deepak Pandian
0 siblings, 2 replies; 7+ messages in thread
From: Benjamin Herrenschmidt @ 2008-12-04 22:54 UTC (permalink / raw)
To: Deepak Pandian; +Cc: linuxppc-dev
On Fri, 2008-12-05 at 00:06 +0530, Deepak Pandian wrote:
> Hi,
>
> In ppc4xx_pci i see the pci size to be declared as
> u32 lah, lal, pciah, pcial, sa;
I think the 4xx code is pretty much ok at this stage no ?
> Also at many other places I see the pci region is not capable of
> handling resources > 4GB. I am planning to work on this arch specific
> code to make it handle pci resource of width greater than 4 GB.
Which "many other places" ?
> But before that i wanted to clarify whether the core kernel will be
> able to handle pci regions with width greater than 4GB.
There's at least one place in the generic PCI code, in
pci_read_bridge_bases(), that needs fixing in a similar way as we
already fixed __pci_read_base(), ie by testing the resource_size_t size
rather than whether the platform is 64-bit.
There might be a few more.
Cheers,
Ben.
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: PCI Resource allocation
2008-12-04 22:54 ` Benjamin Herrenschmidt
@ 2008-12-05 0:12 ` Flores, Raul
2008-12-07 23:00 ` Benjamin Herrenschmidt
2008-12-05 3:40 ` Deepak Pandian
1 sibling, 1 reply; 7+ messages in thread
From: Flores, Raul @ 2008-12-05 0:12 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Deepak Pandian; +Cc: linuxppc-dev
A bit off topic, but since the subject is pci resource allocation:
As entered here:
http://bugs.gentoo.org/show_bug.cgi?id=249832
the 2.6.24-gentoo-r3 kernel; iomem tree for my video display works, but
has not worked in the following kernels:
2.6.26-gentoo-r2
2.6.27-gentoo-r2
2.6.28-rc4 (perfmon2 git)
Using g5_defconfig on an iMac G5 iSight PowerMac 12,1 ppc64 (cross 32
userspace) PPC970FX
Had to hack to arch/powerpc/kernel/pci-common.c in alloc_resource() so
that I could run the 2.6.28 kernel with perfmon2.
Thanks for all the work that gets done here,
Raul
-----Original Message-----
From: linuxppc-dev-bounces+raul.flores=lmco.com@ozlabs.org
[mailto:linuxppc-dev-bounces+raul.flores=lmco.com@ozlabs.org] On Behalf
Of Benjamin Herrenschmidt
Sent: Thursday, December 04, 2008 4:54 PM
To: Deepak Pandian
Cc: linuxppc-dev@ozlabs.org
Subject: Re: PCI Resource allocation
On Fri, 2008-12-05 at 00:06 +0530, Deepak Pandian wrote:
> Hi,
>
> In ppc4xx_pci i see the pci size to be declared as
> u32 lah, lal, pciah, pcial, sa;
I think the 4xx code is pretty much ok at this stage no ?
> Also at many other places I see the pci region is not capable of
> handling resources > 4GB. I am planning to work on this arch specific
> code to make it handle pci resource of width greater than 4 GB.
Which "many other places" ?
> But before that i wanted to clarify whether the core kernel will be
> able to handle pci regions with width greater than 4GB.
There's at least one place in the generic PCI code, in
pci_read_bridge_bases(), that needs fixing in a similar way as we
already fixed __pci_read_base(), ie by testing the resource_size_t size
rather than whether the platform is 64-bit.
There might be a few more.
Cheers,
Ben.
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: PCI Resource allocation
2008-12-05 0:12 ` Flores, Raul
@ 2008-12-07 23:00 ` Benjamin Herrenschmidt
0 siblings, 0 replies; 7+ messages in thread
From: Benjamin Herrenschmidt @ 2008-12-07 23:00 UTC (permalink / raw)
To: Flores, Raul; +Cc: linuxppc-dev, Deepak Pandian
On Thu, 2008-12-04 at 18:12 -0600, Flores, Raul wrote:
> A bit off topic, but since the subject is pci resource allocation:
>
> As entered here:
> http://bugs.gentoo.org/show_bug.cgi?id=249832
>
> the 2.6.24-gentoo-r3 kernel; iomem tree for my video display works, but
> has not worked in the following kernels:
> 2.6.26-gentoo-r2
> 2.6.27-gentoo-r2
> 2.6.28-rc4 (perfmon2 git)
>
> Using g5_defconfig on an iMac G5 iSight PowerMac 12,1 ppc64 (cross 32
> userspace) PPC970FX
>
> Had to hack to arch/powerpc/kernel/pci-common.c in alloc_resource() so
> that I could run the 2.6.28 kernel with perfmon2.
That's strange... looks like something fishy with the PCI-E root
complex, can you enable DEBUG in pci-common.c and pci_64.c and send me
the resulting dmesg output ?
Cheers,
Ben.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: PCI Resource allocation
2008-12-04 22:54 ` Benjamin Herrenschmidt
2008-12-05 0:12 ` Flores, Raul
@ 2008-12-05 3:40 ` Deepak Pandian
1 sibling, 0 replies; 7+ messages in thread
From: Deepak Pandian @ 2008-12-05 3:40 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
Hi Ben,
On Fri, Dec 5, 2008 at 4:24 AM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Fri, 2008-12-05 at 00:06 +0530, Deepak Pandian wrote:
>> Hi,
>>
>> In ppc4xx_pci i see the pci size to be declared as
>> u32 lah, lal, pciah, pcial, sa;
>
> I think the 4xx code is pretty much ok at this stage no ?
Nope. I dont think so . sa is declared as u32 which overrules pci
region width > 4GB.
Further while setting up the outbound mapping ,
if (!is_power_of_2(sa) || sa < 0x100000 ||
sa > 0xffffffffu) {
printk(KERN_WARNING "%s: Resource out of range\n",
port->node->full_name);
continue;
}
the code marks regions with width > 4 GB as out of range.
>> Also at many other places I see the pci region is not capable of
>> handling resources > 4GB. I am planning to work on this arch specific
>> code to make it handle pci resource of width greater than 4 GB.
>
> Which "many other places" ?
In 4xx the OMR registers are programmed to handle only a maximum of 4 GB.
I am in process of understanding how pci resources are allocated in
core kernel. But as far as i digged I could see
pci_read_bases,pci_alloc_bus_resource needs fixing.
>> But before that i wanted to clarify whether the core kernel will be
>> able to handle pci regions with width greater than 4GB.
>
> There's at least one place in the generic PCI code, in
> pci_read_bridge_bases(), that needs fixing in a similar way as we
> already fixed __pci_read_base(), ie by testing the resource_size_t size
> rather than whether the platform is 64-bit.
>
Thanks Ben. Luckily I have a device which seeks more than 4 GB , so I
will try to fix it
--
With Regards,
Deepak Pandian
"Time is precious,One day we will find that we have less than what we
think" -RandyPausch
www.peerlessdeepak.wordpress.com
^ permalink raw reply [flat|nested] 7+ messages in thread
* PCI Resource Allocation.
@ 2002-12-09 14:53 John Traill
0 siblings, 0 replies; 7+ messages in thread
From: John Traill @ 2002-12-09 14:53 UTC (permalink / raw)
To: linuxppc-embedded
I'm porting linux to a development platform with its VIA Southbridge connected to the secondary bus of a PCI bridge.
I've made the following quick hacks to get as far as I have but would now like to get some pointers as to the "right way".
1. The 4k IO space window for the bridge setup isn't enough for all the VIA IO memory space so I've bumped this up to 64K.
2. Because the VIA is on the "wrong side of the bridge" the isa_io_base has effectively been changed to 0xfebf0000.
Again I've made a quick hack to my platform setup.c to reflect this and the kernel now Oops's as per the included debug
capture.
If anyone could give me some pointers as to the right way to approach this I would be most obliged ? Is there any way to
"pin" the VIA to a known address ( 0xfe000000 ) as adding devices onto my primary PCI bus will change the
isa_io_base. Also are there any known issues with PCI-PCI bridging and ppc etc ...
Memory BAT mapping: BAT2=64Mb, BAT3=0Mb, residual: 0Mb
Linux version 2.4.20-pre8 (johnt@sapporo) (gcc version 3.0.4) #24 Mon Dec 9 11:18:22 GMT 2002
Motorola Test Platform
On node 0 totalpages: 16384
zone(0): 16384 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/nfs rw console=ttyS0 ip=dhcp
OpenPIC Version 1.2 (1 CPUs and 8 IRQ sources) at fdfd0000
time_init: decrementer frequency = 24.751442 MHz
Calibrating delay loop... 164.65 BogoMIPS
Memory: 63272k available (1052k kernel code, 340k data, 92k init, 0k highmem)
Dentry cache hash table entries: 8192 (order: 4, 65536 bytes)
Inode cache hash table entries: 4096 (order: 3, 32768 bytes)
Mount-cache hash table entries: 1024 (order: 1, 8192 bytes)
Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes)
Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
Scanning bus 00
Found 00:00 [1057/0006] 000600 00
PCI:00:00.0 Resource 0 [00000000-ffffffff] is unassigned
PCI:00:00.0 Resource 1 [00000000-00000fff] is unassigned
PCI:00:00.0 Resource 2 [00000000-ffffffff] is unassigned
Found 00:88 [10e3/0513] 000604 01
Fixups for bus 00
Scanning behind PCI bridge 00:11.0, config 010100, pass 0
Scanning bus 01
Found 01:10 [1106/0686] 000601 00
Found 01:11 [1106/0571] 000101 00
Fixup res 0 (101) of dev 01:02.1: bffff8 -> fff8
Fixup res 1 (101) of dev 01:02.1: bffff4 -> fff4
Fixup res 2 (101) of dev 01:02.1: bfffe8 -> ffe8
Fixup res 3 (101) of dev 01:02.1: bfffe4 -> ffe4
Fixup res 4 (101) of dev 01:02.1: bfffd0 -> ffd0
Found 01:12 [1106/3038] 000c03 00
Fixup res 4 (101) of dev 01:02.2: bfffa0 -> ffa0
Found 01:13 [1106/3038] 000c03 00
Fixup res 4 (101) of dev 01:02.3: bfff80 -> ff80
Found 01:14 [1106/3057] 000000 00
Found 01:15 [1106/3058] 000401 00
Fixup res 0 (101) of dev 01:02.5: bffe00 -> fe00
Fixup res 1 (101) of dev 01:02.5: bffdfc -> fdfc
Fixup res 2 (101) of dev 01:02.5: bffdf8 -> fdf8
Found 01:16 [1106/3068] 000780 00
Fixup res 0 (101) of dev 01:02.6: bffc00 -> fc00
Fixups for bus 01
Bus scan for 01 returning with max=01
Scanning behind PCI bridge 00:11.0, config 010100, pass 1
Bus scan for 00 returning with max=01
PCI: bridge rsrc 80000000..fcffffff (200), parent c0124d48
PCI: bridge rsrc 0..ffff (101), parent c0184038
PCI: Cannot allocate resource region 0 of PCI bridge 1
PCI: bridge rsrc bfe00000..bfefffff (200), parent c0184054
PCI: bridge rsrc bfd00000..bfdfffff (1201), parent c0184054
PCI:00:11.0: Resource 0: bffff000-bfffffff (f=200)
PCI:01:02.1: Resource 0: 0000fff8-0000ffff (f=101)
PCI: Cannot allocate resource region 0 of device 01:02.1
PCI:01:02.1: Resource 1: 0000fff4-0000fff7 (f=101)
PCI: Cannot allocate resource region 1 of device 01:02.1
PCI:01:02.1: Resource 2: 0000ffe8-0000ffef (f=101)
PCI: Cannot allocate resource region 2 of device 01:02.1
PCI:01:02.1: Resource 3: 0000ffe4-0000ffe7 (f=101)
PCI: Cannot allocate resource region 3 of device 01:02.1
PCI:01:02.1: Resource 4: 0000ffd0-0000ffdf (f=101)
PCI: Cannot allocate resource region 4 of device 01:02.1
PCI:01:02.2: Resource 4: 0000ffa0-0000ffbf (f=101)
PCI: Cannot allocate resource region 4 of device 01:02.2
PCI:01:02.3: Resource 4: 0000ff80-0000ff9f (f=101)
PCI: Cannot allocate resource region 4 of device 01:02.3
PCI:01:02.5: Resource 0: 0000fe00-0000feff (f=101)
PCI: Cannot allocate resource region 0 of device 01:02.5
PCI:01:02.5: Resource 1: 0000fdfc-0000fdff (f=101)
PCI: Cannot allocate resource region 1 of device 01:02.5
PCI:01:02.5: Resource 2: 0000fdf8-0000fdfb (f=101)
PCI: Cannot allocate resource region 2 of device 01:02.5
PCI:01:02.6: Resource 0: 0000fc00-0000fcff (f=101)
PCI: Cannot allocate resource region 0 of device 01:02.6
Oops: kernel access of bad area, sig: 11
NIP: C01382D4 XER: 00000000 LR: C000D058 SP: C0261F50 REGS: c0261ea0 TRAP: 0300 Not tainted
MSR: 00009032 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 11
DAR: 00000008, DSISR: 22000000
TASK = c0260000[1] 'swapper' Last syscall: -1
last math 00000000 last altivec 00000000
GPR00: 00000000 C0261F50 C0260000 C024A640 00001032 C0261F78 00000F38 00000000
GPR08: FEC00000 00001000 00160000 C024A6D4 24002022 20122F04 03FE6000 03F3FC18
GPR16: 00000000 00000001 007FFF00 FFFFFFFF 003FF000 00000000 00000000 C0130000
GPR24: C024A64C C024A640 C0184000 007FFF26 C024A6C0 C0150000 00000000 C0249400
Call backtrace:
C00A9874 C000D058 C0138574 C01459B8 C01365DC C0003AC8 C0008298
Kernel panic: Attempted to kill init!
<0>Rebooting in 180 seconds..
--
Regards, John
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 7+ messages in thread
* PCI resource allocation
@ 2000-10-04 6:53 Michael Thompson
0 siblings, 0 replies; 7+ messages in thread
From: Michael Thompson @ 2000-10-04 6:53 UTC (permalink / raw)
To: linuxppc-dev
Hello,
I'm porting linux to a custom 8240 based board. This board has
two PCI buses; bus 0 is a 66MHz bus, and bus 1 is a 33MHz bus, so there
is a PCI-PCI bridge (1011/0023) on bus 0.
On bus 1, there is one ethernet device (1022:2000) and a PCI-ISA
bridge (100b/0021).
There is a problem allocating resources for the ethernet device, and
I'm afraid I'm clueless at the moment. Can anybody give me an idea
what might be going on?
Thanks!
-Michael Thompson
mickey@berkeley.innomedia.com
----
Total memory = 3136MB; using 0kB for hash table (at 00000000)
Linux version 2.4.0-test9 (mickey@richter) (gcc version 2.95.2 19991024 (release/franzo)) #17 Tue Oct 3 23:38:55 PDT 2000
Boot arguments: root=nfs console=ttyS0,9600
On node 0 totalpages: 802816
zone(0): 802816 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=nfs console=ttyS0,9600
OpenPIC Version 1.2 (1 CPUs and 24 IRQ sources) at fc040000
OpenPIC timer frequency is not set
time_init: decrementer frequency = 66.000000 MHz
Calibrating delay loop... 439.09 BogoMIPS
Memory: 8864k available (0k kernel code, 0k data, 0k init, 0k highmem)
Dentry-cache hash table entries: 262144 (order: 9, 2097152 bytes)
Buffer-cache hash table entries: 262144 (order: 8, 1048576 bytes)
Page-cache hash table entries: 524288 (order: 9, 2097152 bytes)
Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
Scanning bus 00
Found 00:00 [1057/0003] 000600 00
Found 00:80 [11ab/4809] 000200 00
Found 00:88 [1011/0023] 000604 01
Fixups for bus 00
Scanning behind PCI bridge 00:11.0, config 010100, pass 0
Scanning bus 01
Found 01:00 [1022/2000] 000200 00
Found 01:10 [100b/0021] 000601 00
Fixups for bus 01
Bus scan for 01 returning with max=01
Scanning behind PCI bridge 00:11.0, config 010100, pass 1
Bus scan for 00 returning with max=01
PCI: Resource 80100000-80100fff (f=200, d=0, p=0)
PCI: Cannot allocate resource region 1 of device 00:00.0
PCI: Resource 80200000-803fffff (f=200, d=1, p=1)
PCI: Cannot allocate resource region 0 of device 00:10.0
PCI: Resource 00801000-00801003 (f=101, d=1, p=1)
PCI: Resource 00800000-0080001f (f=101, d=1, p=1)
PCI: Cannot allocate resource region 0 of device 01:00.0
PCI: Resource a0100000-a010001f (f=200, d=1, p=1)
got res[10000000:101fffff] for resource 0
PCI: Failed to allocate resource 0 for PCI device 1022:2000
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2008-12-07 23:00 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-12-04 18:36 PCI Resource allocation Deepak Pandian
2008-12-04 22:54 ` Benjamin Herrenschmidt
2008-12-05 0:12 ` Flores, Raul
2008-12-07 23:00 ` Benjamin Herrenschmidt
2008-12-05 3:40 ` Deepak Pandian
-- strict thread matches above, loose matches on Subject: below --
2002-12-09 14:53 PCI Resource Allocation John Traill
2000-10-04 6:53 PCI resource allocation Michael Thompson
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