From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Cc: linuxppc-dev@ozlabs.org, Kumar Gala <kumar.gala@freescale.com>
Subject: Re: [PATCH 3/9] powerpc/4xx: Extended DCR support
Date: Tue, 09 Dec 2008 14:03:23 +1100 [thread overview]
Message-ID: <1228791803.7101.51.camel@pasglop> (raw)
In-Reply-To: <20081208203011.GB10929@yoda.jdub.homelinux.org>
On Mon, 2008-12-08 at 15:30 -0500, Josh Boyer wrote:
> Can we call this CPU_FTRS_440x6 please? The H really has no relevance
> here from what I understand as both the hard and synthysized x6 cores
> would do the indexed instructions.
I'll change that.
> I'm wondering how much that is worth it. Aren't you adding a
> runtime if here (and in the *dcri functions), which might
> impact performance for anything not implementing m*dcrx?
>
> Does anyone know how much impact this has either way, and if
> it's significant could it be patched out after the CPU
> features are set?
So whatever the construct, gcc generates something quite horrible, on
the other hand, written like this is probably the less horrible I've
seen. The performance penalty shouldn't be huge, DCR accesses are slow.
Now, what we can/should do, but I'd rather do that from a separate patch
after you also cleanup that 440x5 stuff for machine check, is to be more
pro-active in cputable,h, at defining which 440 variants are effectively
enabled in Kconfig, and reflecting that in CPU_FTRS_POSSIBLE and
CPU_FTRS_ALWAYS.
That way, the cpu_has_feature() statement would be resolved at compile
time (either way) for all cases where only one variant of 440 is
compiled in (most cases). Only the case where support for multiple
variants is compiled in would result in the actual condition being in
the final code.
A way to do this is to define CONFIG_PPC_440x0, x5 and x6 and have those
be select'ed by the various SoC types which are themselves selected by
the platforms (I use x0 as "anything < x5" here). Then we can use these
to selectively or/and in thse various CPU features in cputable.h
"possible" and "always" masks.
So I'll resend the patch with just the 440H6->440x6 change and we'll do
those feature improvements in a separate patch.
Cheers,
Ben.
next prev parent reply other threads:[~2008-12-09 3:05 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-08 5:39 [PATCH 0/9] powerpc: Preliminary work to enable SMP BookE Benjamin Herrenschmidt
2008-12-08 5:39 ` [PATCH 1/9] powerpc: Fix bogus cache flushing on all 40x and BookE processors v2 Benjamin Herrenschmidt
2008-12-12 0:15 ` Josh Boyer
2008-12-13 23:49 ` Kumar Gala
2008-12-08 5:39 ` [PATCH 2/9] powerpc: Fix asm EMIT_BUG_ENTRY with !CONFIG_BUG Benjamin Herrenschmidt
2008-12-08 5:40 ` [PATCH 3/9] powerpc/4xx: Extended DCR support Benjamin Herrenschmidt
2008-12-08 20:30 ` Josh Boyer
2008-12-09 3:03 ` Benjamin Herrenschmidt [this message]
2008-12-08 5:40 ` [PATCH 4/9] powerpc: Add local_flush_tlb_mm() to SW loaded TLB implementations Benjamin Herrenschmidt
2008-12-08 5:40 ` [PATCH 5/9] powerpc: Split mmu_context handling Benjamin Herrenschmidt
2008-12-08 5:40 ` [PATCH 6/9] powerpc: Rework context management for CPUs with no hash table Benjamin Herrenschmidt
2008-12-08 5:40 ` [PATCH 7/9] powerpc: Rename tlb_32.c and tlb_64.c to tlb_hash32.c and tlb_hash64.c Benjamin Herrenschmidt
2008-12-08 5:40 ` [PATCH 8/9] powerpc: Introduce MMU features Benjamin Herrenschmidt
2008-12-08 5:40 ` [PATCH 9/9] powerpc: Add SMP support to no-hash TLB handling Benjamin Herrenschmidt
2008-12-08 22:32 ` Scott Wood
2008-12-09 1:47 ` Benjamin Herrenschmidt
2008-12-09 13:17 ` [PATCH 0/9] powerpc: Preliminary work to enable SMP BookE Kumar Gala
2008-12-09 20:12 ` Benjamin Herrenschmidt
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