From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Trent Piepho <tpiepho@freescale.com>
Cc: linuxppc-dev@ozlabs.org, Paul Mackerras <paulus@samba.org>,
xyzzy@speakeasy.org,
MTD mailing list <linux-mtd@lists.infradead.org>
Subject: Re: [PATCH] POWERPC: MTD: Add cached map support to physmap_of MTD driver
Date: Tue, 16 Dec 2008 19:56:56 +1100 [thread overview]
Message-ID: <1229417816.7319.4.camel@pasglop> (raw)
In-Reply-To: <Pine.LNX.4.64.0812151653050.28806@t2.domain.actdsltmp>
On Mon, 2008-12-15 at 17:11 -0800, Trent Piepho wrote:
> Shame, as it provides a huge speed up. I suppose an alternative would be
> to map the chip twice at different physical addresses, by just configuring
> the chip select to be twice the size it should be, and giving them
> different cacheability.
Nice trick. That would probably work.
> Or changing the mapping for writes and then changing it back. It wouldn't
> be necessary to change the whole thing, just the page being written to.
Right though changing mappings can be expensive. It might be worth
looking at using fixmap for that tho, which is the fastest way to setup
and tear down mappings, especially since we can (though we don't today)
implement a bypass on those to directly load the TLB.
Cheers,
Ben.
next prev parent reply other threads:[~2008-12-16 8:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-15 18:25 [PATCH] POWERPC: MTD: Add cached map support to physmap_of MTD driver Trent Piepho
2008-12-15 18:30 ` Josh Boyer
2008-12-15 22:56 ` Trent Piepho
2008-12-16 0:21 ` Paul Mackerras
2008-12-16 1:11 ` Trent Piepho
2008-12-16 8:56 ` Benjamin Herrenschmidt [this message]
2008-12-17 21:01 ` Trent Piepho
2008-12-16 8:55 ` Benjamin Herrenschmidt
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