[PATCH] powerpc/mm: Fix _PAGE_COHERENT support on classic ppc32 HW

[PATCH] powerpc/mm: Fix _PAGE_COHERENT support on classic ppc32 HW

[Kumar Gala]

The following commit:

commit 64b3d0e8122b422e879b23d42f9e0e8efbbf9744
Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date:   Thu Dec 18 19:13:51 2008 +0000

    powerpc/mm: Rework usage of _PAGE_COHERENT/NO_CACHE/GUARDED

broke setting of the _PAGE_COHERENT bit in the PPC HW PTE.  Since we now
actually set _PAGE_COHERENT in the Linux PTE we shouldn't be clearing it
out before we propogate it to the PPC HW PTE.

Reported-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/mm/hash_low_32.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index 67850ec..14af8ce 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -320,7 +320,7 @@ _GLOBAL(create_hpte)
 	and	r8,r8,r0		/* writable if _RW & _DIRTY */
 	rlwimi	r5,r5,32-1,30,30	/* _PAGE_USER -> PP msb */
 	rlwimi	r5,r5,32-2,31,31	/* _PAGE_USER -> PP lsb */
-	ori	r8,r8,0xe14		/* clear out reserved bits and M */
+	ori	r8,r8,0xe04		/* clear out reserved bits */
 	andc	r8,r5,r8		/* PP = user? (rw&dirty? 2: 3): 0 */
 BEGIN_FTR_SECTION
 	rlwinm	r8,r8,0,~_PAGE_COHERENT	/* clear M (coherence not required) */
-- 
1.5.6.6

Re: [PATCH] powerpc/mm: Fix _PAGE_COHERENT support on classic ppc32 HW

[Becky Bruce]

On Feb 10, 2009, at 2:57 PM, Kumar Gala wrote:

> The following commit:
>
> commit 64b3d0e8122b422e879b23d42f9e0e8efbbf9744
> Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Date:   Thu Dec 18 19:13:51 2008 +0000
>
>    powerpc/mm: Rework usage of _PAGE_COHERENT/NO_CACHE/GUARDED
>
> broke setting of the _PAGE_COHERENT bit in the PPC HW PTE.  Since we  
> now
> actually set _PAGE_COHERENT in the Linux PTE we shouldn't be  
> clearing it
> out before we propogate it to the PPC HW PTE.
>
> Reported-by: Martyn Welch <martyn.welch@gefanuc.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

I've booted 8641 dual-core and run LTP to completion with an expected  
number of fails.  So....

Acked-by: Becky Bruce <beckyb@kernel.crashing.org>

-B

>
> ---
> arch/powerpc/mm/hash_low_32.S |    2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/ 
> hash_low_32.S
> index 67850ec..14af8ce 100644
> --- a/arch/powerpc/mm/hash_low_32.S
> +++ b/arch/powerpc/mm/hash_low_32.S
> @@ -320,7 +320,7 @@ _GLOBAL(create_hpte)
> 	and	r8,r8,r0		/* writable if _RW & _DIRTY */
> 	rlwimi	r5,r5,32-1,30,30	/* _PAGE_USER -> PP msb */
> 	rlwimi	r5,r5,32-2,31,31	/* _PAGE_USER -> PP lsb */
> -	ori	r8,r8,0xe14		/* clear out reserved bits and M */
> +	ori	r8,r8,0xe04		/* clear out reserved bits */
> 	andc	r8,r5,r8		/* PP = user? (rw&dirty? 2: 3): 0 */
> BEGIN_FTR_SECTION
> 	rlwinm	r8,r8,0,~_PAGE_COHERENT	/* clear M (coherence not required) */
> -- 
> 1.5.6.6

Re: [PATCH] powerpc/mm: Fix _PAGE_COHERENT support on classic ppc32 HW

[Martyn Welch]

Kumar Gala wrote:
> The following commit:
> 
> commit 64b3d0e8122b422e879b23d42f9e0e8efbbf9744
> Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Date:   Thu Dec 18 19:13:51 2008 +0000
> 
>     powerpc/mm: Rework usage of _PAGE_COHERENT/NO_CACHE/GUARDED
> 
> broke setting of the _PAGE_COHERENT bit in the PPC HW PTE.  Since we now
> actually set _PAGE_COHERENT in the Linux PTE we shouldn't be clearing it
> out before we propogate it to the PPC HW PTE.
> 
> Reported-by: Martyn Welch <martyn.welch@gefanuc.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
>  arch/powerpc/mm/hash_low_32.S |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
> index 67850ec..14af8ce 100644
> --- a/arch/powerpc/mm/hash_low_32.S
> +++ b/arch/powerpc/mm/hash_low_32.S
> @@ -320,7 +320,7 @@ _GLOBAL(create_hpte)
>  	and	r8,r8,r0		/* writable if _RW & _DIRTY */
>  	rlwimi	r5,r5,32-1,30,30	/* _PAGE_USER -> PP msb */
>  	rlwimi	r5,r5,32-2,31,31	/* _PAGE_USER -> PP lsb */
> -	ori	r8,r8,0xe14		/* clear out reserved bits and M */
> +	ori	r8,r8,0xe04		/* clear out reserved bits */
>  	andc	r8,r5,r8		/* PP = user? (rw&dirty? 2: 3): 0 */
>  BEGIN_FTR_SECTION
>  	rlwinm	r8,r8,0,~_PAGE_COHERENT	/* clear M (coherence not required) */

This does indeed resolve the problem I was having.

Sorry for not replying sooner - bad weather here in the UK unexpectedly extended a planned holiday.

Thank you for resolving this issue,

Martyn

-- 
Martyn Welch MEng MPhil MIET (Principal Software Engineer)   T:+44(0)1327322748
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