From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.wrs.com (mail.windriver.com [147.11.1.11]) by ozlabs.org (Postfix) with ESMTP id 2B828DE05D for ; Wed, 4 Mar 2009 19:39:27 +1100 (EST) From: Liming Wang To: Benjamin Herrenschmidt , Paul Mackerras Subject: [PATCH] Add unwind information for SPE registers of E500 core Date: Wed, 4 Mar 2009 12:51:18 +0800 Message-Id: <1236142278-9276-1-git-send-email-liming.wang@windriver.com> Cc: linuxppc-dev@ozlabs.org, Liming Wang , Alan Modra List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , SPE registers use the high part bit0~bit31 of E500 GPR0~GPR31. The unwind information in "eh_frame" section is used during exception handling and describes register information in the signal frame. But current unwind information doesn't cover SPE registers, which have been saved in the signal frame. This patch adds this unwind information to "eh_frame" section. SPE registers use register number 1200+N to identify register 'N', but they start from 113 in unwind column, which is computed from gcc source code, macro DWARF_REG_TO_UNWIND_COLUMN: #define FIRST_PSEUDO_REGISTER 114 #define DWARF_REG_TO_UNWIND_COLUMN(r) \ ((r) > 1200 ? ((r) - 1200 + FIRST_PSEUDO_REGISTER - 1) : (r)) Signed-off-by: Liming Wang --- arch/powerpc/kernel/vdso32/sigtramp.S | 34 +++++++++++++++++++++++++++++++++ 1 files changed, 34 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/kernel/vdso32/sigtramp.S b/arch/powerpc/kernel/vdso32/sigtramp.S index 68d49dd..789a343 100644 --- a/arch/powerpc/kernel/vdso32/sigtramp.S +++ b/arch/powerpc/kernel/vdso32/sigtramp.S @@ -251,6 +251,40 @@ V_FUNCTION_END(__kernel_sigtramp_rt32) vsave_msr1 (31); \ vsave_msr2 (33, 32*16+12); \ vsave (32, 32*16) +#elif defined(CONFIG_SPE) +#define EH_FRAME_VMX \ + rsave (113, VREGS); \ + rsave (114, VREGS + 1*4); \ + rsave (115, VREGS + 2*4); \ + rsave (116, VREGS + 3*4); \ + rsave (117, VREGS + 4*4); \ + rsave (118, VREGS + 5*4); \ + rsave (119, VREGS + 6*4); \ + rsave (120, VREGS + 7*4); \ + rsave (121, VREGS + 8*4); \ + rsave (122, VREGS + 9*4); \ + rsave (123, VREGS + 10*4); \ + rsave (124, VREGS + 11*4); \ + rsave (125, VREGS + 12*4); \ + rsave (126, VREGS + 13*4); \ + rsave (127, VREGS + 14*4); \ + rsave (128, VREGS + 15*4); \ + rsave (129, VREGS + 16*4); \ + rsave (130, VREGS + 17*4); \ + rsave (131, VREGS + 18*4); \ + rsave (132, VREGS + 19*4); \ + rsave (133, VREGS + 20*4); \ + rsave (134, VREGS + 21*4); \ + rsave (135, VREGS + 22*4); \ + rsave (136, VREGS + 23*4); \ + rsave (137, VREGS + 24*4); \ + rsave (138, VREGS + 25*4); \ + rsave (139, VREGS + 26*4); \ + rsave (140, VREGS + 27*4); \ + rsave (141, VREGS + 28*4); \ + rsave (142, VREGS + 29*4); \ + rsave (143, VREGS + 30*4); \ + rsave (144, VREGS + 31*4); #else #define EH_FRAME_VMX #endif -- 1.6.0.2.GIT