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From: Harry Ciao <qingtao.cao@windriver.com>
To: benh@kernel.crashing.org, bluesmoke-devel@lists.sourceforge.net
Cc: linuxppc-dev@ozlabs.org, linux-kernel@vger.kernel.org
Subject: [v1 PATCH 0/4] Add INT mode support for EDAC drivers on Maple
Date: Mon, 18 May 2009 18:04:56 +0800	[thread overview]
Message-ID: <1242641100-15324-1-git-send-email-qingtao.cao@windriver.com> (raw)


Hi Ben,

This is the v2 patches that have integrated your suggestions to
remove the refcount for a hwriq2virq mapping as long as we don't
dispose it, the changes are mostly within the 1/4 patch where the
unnecessary refcount and irqmap structure are removed, and callings
to edac_put_mpic_irq() are also removed from the rest of patches.

Since there are 3 EDAC modules on Maple will use one same copy of
code to create hwirq2virq mappings, I perfer to preserve it in
edac_mpic_irq.c.

How do feel about the assumption that MPIC will latch INT 0 pin for 
the NMI Reqeust Messages whose vector is == 0? This is the thing that
I have least confidence in, so far all I can get is the brief
introduction in CPC925 user manual that "This interrupt vector is used
to set a corresponding interrupt latch", P111, so I think it imples that
vector==0 will latch pin #0.

Many thanks for all your comments!

Best regards,

Harry

             reply	other threads:[~2009-05-18 10:04 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-05-18 10:04 Harry Ciao [this message]
2009-05-18 10:04 ` [v1 PATCH 1/4] EDAC: MPIC Hypertransport IRQ support Harry Ciao
2009-05-18 10:04   ` [v1 PATCH 2/4] EDAC: MCE & INT mode support for CPC925 driver Harry Ciao
2009-05-18 10:04     ` [v1 PATCH 3/4] EDAC: INT mode support for AMD8111 driver Harry Ciao
2009-05-18 10:05       ` [v1 PATCH 4/4] EDAC: INT mode support for AMD8131 driver Harry Ciao

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