From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A20F8DDFA2 for ; Thu, 21 May 2009 08:49:52 +1000 (EST) Subject: Re: Musings on PCI busses From: Benjamin Herrenschmidt To: David Miller In-Reply-To: <20090520.154104.48737237.davem@davemloft.net> References: <20090520.122453.169463011.davem@davemloft.net> <1242856782.16901.203.camel@pasglop> <20090520.154104.48737237.davem@davemloft.net> Content-Type: text/plain Date: Thu, 21 May 2009 08:49:41 +1000 Message-Id: <1242859781.16901.216.camel@pasglop> Mime-Version: 1.0 Cc: linuxppc-dev@ozlabs.org, thunderbird2k@gmail.com, John.Linn@xilinx.com List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, 2009-05-20 at 15:41 -0700, David Miller wrote: > This is exactly what sparc64 does as well, I took the powerpc code. :) > > It also avoids a bunch of bugs that get unearthed as a result of > scanning the entire hierarchy with PCI config access "pokes". Some > PCI controllers hang when certain PCI config space addresses are > accessed, meanwhile some hypervisor versions don't generate the bus > timeout exception properly on PCI config accesses to nonexisting > devices, the list is endless. > > And all of that went away when I imported the ppc64 code to do > this using the OF device tree. > > So if you put this in a common place, let's consolidate the differences > accumulated in the sparc64 code so I can use it too :-) Allright, I'll give that a go asap, maybe tomorrow. Cheers, Ben.