From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] powerpc: Allow perf_counters to access user memory at interrupt time
Date: Tue, 11 Aug 2009 16:44:53 +1000 [thread overview]
Message-ID: <1249973093.9841.107.camel@pasglop> (raw)
In-Reply-To: <19066.25278.925555.133212@drongo.ozlabs.ibm.com>
On Thu, 2009-08-06 at 14:57 +1000, Paul Mackerras wrote:
> This provides a mechanism to allow the perf_counters code to access
> user memory in a PMU interrupt routine. Such an access can cause
> various kinds of interrupt: SLB miss, MMU hash table miss, segment
> table miss, or TLB miss, depending on the processor. This commit
> only deals with the classic/server processors that use an MMU hash
> table, not processors that have software-loaded TLBs.
.../...
> Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
As discussed in the lab, you should also do a pre-req patch to pgtable.h
that changes ppc32 with 64-bit PTE without CONFIG_SMP to use the same
path as SMP to order the stores to the two halves of the PTEs though.
Cheers,
Ben.
prev parent reply other threads:[~2009-08-11 6:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-06 4:57 [PATCH v2] powerpc: Allow perf_counters to access user memory at interrupt time Paul Mackerras
2009-08-06 4:58 ` [PATCH v2] perf_counter: powerpc: Add callchain support Paul Mackerras
2009-08-11 7:01 ` Benjamin Herrenschmidt
2009-08-11 6:44 ` Benjamin Herrenschmidt [this message]
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