From: Kumar Gala <galak@kernel.crashing.org>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Subject: [PATCH 4/5] powerpc/book3e-64: Add helper function to setup IVORs
Date: Wed, 19 Aug 2009 00:08:32 -0500 [thread overview]
Message-ID: <1250658513-13009-4-git-send-email-galak@kernel.crashing.org> (raw)
In-Reply-To: <1250658513-13009-3-git-send-email-galak@kernel.crashing.org>
Not all 64-bit Book-3E parts will have fixed IVORs so add a function that
cpusetup code can call to setup the base IVORs (0..15) to match the fixed
offsets. We need to 'or' part of interrupt_base_book3e into the IVORs
since on parts that have them the IVPR doesn't extend as far down.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/include/asm/exception-64e.h | 4 ++++
arch/powerpc/kernel/exceptions-64e.S | 19 +++++++++++++++++++
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64e.h b/arch/powerpc/include/asm/exception-64e.h
index 94cb3d7..6d53f31 100644
--- a/arch/powerpc/include/asm/exception-64e.h
+++ b/arch/powerpc/include/asm/exception-64e.h
@@ -196,6 +196,10 @@ exc_##label##_book3e:
#define TLB_MISS_STATS_SAVE_INFO
#endif
+#define SET_IVOR(vector_number, vector_offset) \
+ li r3,vector_offset@l; \
+ ori r3,r3,interrupt_base_book3e@l; \
+ mtspr SPRN_IVOR##vector_number,r3;
#endif /* _ASM_POWERPC_EXCEPTION_64E_H */
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 3611b0e..662236c 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -782,5 +782,24 @@ _STATIC(init_thread_book3e)
blr
+_GLOBAL(__setup_base_ivors)
+ SET_IVOR(0, 0x020) /* Critical Input */
+ SET_IVOR(1, 0x000) /* Machine Check */
+ SET_IVOR(2, 0x060) /* Data Storage */
+ SET_IVOR(3, 0x080) /* Instruction Storage */
+ SET_IVOR(4, 0x0a0) /* External Input */
+ SET_IVOR(5, 0x0c0) /* Alignment */
+ SET_IVOR(6, 0x0e0) /* Program */
+ SET_IVOR(7, 0x100) /* FP Unavailable */
+ SET_IVOR(8, 0x120) /* System Call */
+ SET_IVOR(9, 0x140) /* Auxiliary Processor Unavailable */
+ SET_IVOR(10, 0x160) /* Decrementer */
+ SET_IVOR(11, 0x180) /* Fixed Interval Timer */
+ SET_IVOR(12, 0x1a0) /* Watchdog Timer */
+ SET_IVOR(13, 0x1c0) /* Data TLB Error */
+ SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
+ SET_IVOR(15, 0x040) /* Debug */
+ sync
+ blr
--
1.6.0.6
next prev parent reply other threads:[~2009-08-19 5:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-19 5:08 [PATCH 1/5] powerpc/mm: Add MMU features for TLB reservation & Paired MAS registers Kumar Gala
2009-08-19 5:08 ` [PATCH 2/5] powerpc/book3e-64: Move the default cpu table entry Kumar Gala
2009-08-19 5:08 ` [PATCH 3/5] powerpc/book3e-64: Wait til generic_calibrate_decr to enable decrementer Kumar Gala
2009-08-19 5:08 ` Kumar Gala [this message]
2009-08-19 5:08 ` [PATCH 5/5] powerpc/book3e-64: Add support to initial_tlb_book3e for non-HES TLB Kumar Gala
2009-08-19 7:25 ` [PATCH 1/5] powerpc/mm: Add MMU features for TLB reservation & Paired MAS registers Benjamin Herrenschmidt
2009-08-19 21:37 ` Kumar Gala
2009-08-20 0:43 ` Benjamin Herrenschmidt
2009-08-24 16:12 ` Kumar Gala
2009-08-25 1:08 ` Benjamin Herrenschmidt
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