From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Cc: Scott Wood <scottwood@freescale.com>,
"linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
Rex Feany <RFeany@mrv.com>
Subject: Re: [PATCH 04/10] 8xx: Always pin kernel instruction TLB
Date: Wed, 09 Dec 2009 19:56:35 +1100 [thread overview]
Message-ID: <1260348995.16132.37.camel@pasglop> (raw)
In-Reply-To: <OFB03B60EA.0352DA78-ONC1257687.002955A6-C1257687.002A145F@transmode.se>
On Wed, 2009-12-09 at 08:39 +0100, Joakim Tjernlund wrote:
> The later isn't as simple :) I believe the bulk of such code in
> entry_32.S.
Yeah but it would be useful for hash I suppose if one really wants to
boot with nobats. Though at least on hash most of the time we have ways
to recover by mean of MSR:RI being cleared, which your TLB miss code
doesn't check...
> Anyhow, the config option is still valid as if enabled
> it will pin several DTLB's too. Scott had some concerns about removing
> the config option completely so this was the next best thing.
Well, if you want to pin at least one entry, then just remove the #if
completely but don't leave a #if 1 :-)
Cheers,
Ben.
next prev parent reply other threads:[~2009-12-09 8:56 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-20 10:21 [PATCH 00/10 v6] Fix 8xx MMU/TLB Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 01/10] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 02/10] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 03/10] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 05/10] 8xx: Fixup DAR from buggy dcbX instructions Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 06/10] 8xx: Add missing Guarded setting in DTLB Error Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 07/10] 8xx: Restore _PAGE_WRITETHRU Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 08/10] 8xx: start using dcbX instructions in various copy routines Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 09/10] 8xx: Remove DIRTY pte handling in DTLB Error Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 10/10] 8xx: DTLB Miss cleanup Joakim Tjernlund
2009-12-09 4:19 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Benjamin Herrenschmidt
2009-12-09 7:39 ` Joakim Tjernlund
2009-12-09 8:56 ` Benjamin Herrenschmidt [this message]
2009-12-09 9:24 ` Joakim Tjernlund
2009-12-29 15:10 ` Joakim Tjernlund
2009-11-20 20:28 ` [PATCH 00/10 v6] Fix 8xx MMU/TLB Rex Feany
2009-11-21 10:27 ` Joakim Tjernlund
2009-11-27 10:57 ` Joakim Tjernlund
2009-11-27 21:37 ` Benjamin Herrenschmidt
2009-11-30 22:25 ` Scott Wood
2009-11-30 22:30 ` Joakim Tjernlund
2009-12-08 8:38 ` Joakim Tjernlund
2009-12-08 20:01 ` Benjamin Herrenschmidt
-- strict thread matches above, loose matches on Subject: below --
2009-11-15 17:09 [PATCH 00/10] " Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 01/10] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 02/10] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 03/10] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2009-11-14 10:42 [PATCH 00/10] Fix 8xx MMU/TLB Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 01/10] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 02/10] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 03/10] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2009-11-14 18:08 ` Dan Malek
2009-11-14 19:08 ` Joakim Tjernlund
2009-11-14 21:41 ` Benjamin Herrenschmidt
2009-11-15 6:49 ` Roland Dreier
2009-11-15 16:08 ` Joakim Tjernlund
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