* [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards
@ 2010-01-12 14:09 Stef van Os
2010-01-12 23:18 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 6+ messages in thread
From: Stef van Os @ 2010-01-12 14:09 UTC (permalink / raw)
To: Felix Radensky, Benjamin Herrenschmidt
Cc: linuxppc-dev, Stefan Roese, Feng Kan
This=20patch=20adds=20type=201=20PCI=20transactions=20to=204xx=20PCI=20co=
de,=20enabling=20the
discovery=20of
devices=20behind=20a=20PCI=20bridge.
Signed-off-by:=20Stef=20van=20Os=20<stef.van.os@gmail.com>
---
=20arch/powerpc/sysdev/ppc4xx_pci.c=20|=20=20=20=206=20++++--
=201=20files=20changed,=204=20insertions(+),=202=20deletions(-)
diff=20--git=20a/arch/powerpc/sysdev/ppc4xx_pci.c
b/arch/powerpc/sysdev/ppc4xx_pci.c
index=206ff9d71..370cc1c=20100644
---=20a/arch/powerpc/sysdev/ppc4xx_pci.c
+++=20b/arch/powerpc/sysdev/ppc4xx_pci.c
@@=20-363,7=20+363,8=20@@=20static=20void=20__init=20ppc4xx_probe_pci_bri=
dge(struct
device_node=20*np)
=20=20=20=20=20=20=20=20hose->last_busno=20=3D=20bus_range=20?=20bus_rang=
e[1]=20:=200xff;
=20=20=20=20=20=20=20=20/*=20Setup=20config=20space=20*/
-=20=20=20=20=20=20=20setup_indirect_pci(hose,=20rsrc_cfg.start,=20rsrc_c=
fg.start=20+=200x4,
0);
+=20=20=20=20=20=20=20setup_indirect_pci(hose,=20rsrc_cfg.start,=20rsrc_c=
fg.start=20+=200x4,
+=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20PPC_INDIRECT_TYPE_SET_CFG_TY=
PE);
=20=20=20=20=20=20=20=20/*=20Disable=20all=20windows=20*/
=20=20=20=20=20=20=20=20writel(0,=20reg=20+=20PCIL0_PMM0MA);
@@=20-569,7=20+570,8=20@@=20static=20void=20__init=20ppc4xx_probe_pcix_br=
idge(struct
device_node=20*np)
=20=20=20=20=20=20=20=20hose->last_busno=20=3D=20bus_range=20?=20bus_rang=
e[1]=20:=200xff;
=20=20=20=20=20=20=20=20/*=20Setup=20config=20space=20*/
-=20=20=20=20=20=20=20setup_indirect_pci(hose,=20rsrc_cfg.start,=20rsrc_c=
fg.start=20+=200x4,
0);
+=20=20=20=20=20=20=20setup_indirect_pci(hose,=20rsrc_cfg.start,=20rsrc_c=
fg.start=20+=200x4,
+=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20PPC_INDIRECT_TYPE_SET_CFG_TY=
PE);
=20=20=20=20=20=20=20=20/*=20Disable=20all=20windows=20*/
=20=20=20=20=20=20=20=20writel(0,=20reg=20+=20PCIX0_POM0SA);
Disclaimer:=20The=20information=20contained=20in=20this=20email,=20includ=
ing=20any=20attachments=20is=20
confidential=20and=20is=20for=20the=20sole=20use=20of=20the=20intended=20=
recipient(s).=20Any=20unauthorized=20
review,=20use,=20disclosure=20or=20distribution=20is=20prohibited.=20If=
=20you=20are=20not=20the=20intended=20
recipient,=20please=20notify=20the=20sender=20immediately=20by=20replying=
=20to=20this=20message=20and=20
destroy=20all=20copies=20of=20this=20message=20and=20any=20attachments.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards
2010-01-12 14:09 [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards Stef van Os
@ 2010-01-12 23:18 ` Benjamin Herrenschmidt
2010-01-14 4:56 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 6+ messages in thread
From: Benjamin Herrenschmidt @ 2010-01-12 23:18 UTC (permalink / raw)
To: Stef van Os; +Cc: linuxppc-dev, Felix Radensky, Stefan Roese, Feng Kan
On Tue, 2010-01-12 at 15:09 +0100, Stef van Os wrote:
> This patch adds type 1 PCI transactions to 4xx PCI code, enabling the
> discovery of
> devices behind a PCI bridge.
Your patch appears word wrapped and whitespace damaged...
I'll fix it up manually this time around but please check your mailer
setup :-)
Cheers,
Ben.
> Signed-off-by: Stef van Os <stef.van.os@gmail.com>
> ---
> arch/powerpc/sysdev/ppc4xx_pci.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c
> b/arch/powerpc/sysdev/ppc4xx_pci.c
> index 6ff9d71..370cc1c 100644
> --- a/arch/powerpc/sysdev/ppc4xx_pci.c
> +++ b/arch/powerpc/sysdev/ppc4xx_pci.c
> @@ -363,7 +363,8 @@ static void __init ppc4xx_probe_pci_bridge(struct
> device_node *np)
> hose->last_busno = bus_range ? bus_range[1] : 0xff;
>
> /* Setup config space */
> - setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
> 0);
> + setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
> + PPC_INDIRECT_TYPE_SET_CFG_TYPE);
>
> /* Disable all windows */
> writel(0, reg + PCIL0_PMM0MA);
> @@ -569,7 +570,8 @@ static void __init ppc4xx_probe_pcix_bridge(struct
> device_node *np)
> hose->last_busno = bus_range ? bus_range[1] : 0xff;
>
> /* Setup config space */
> - setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
> 0);
> + setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
> + PPC_INDIRECT_TYPE_SET_CFG_TYPE);
>
> /* Disable all windows */
> writel(0, reg + PCIX0_POM0SA);
>
>
> Disclaimer: The information contained in this email, including any attachments is
> confidential and is for the sole use of the intended recipient(s). Any unauthorized
> review, use, disclosure or distribution is prohibited. If you are not the intended
> recipient, please notify the sender immediately by replying to this message and
> destroy all copies of this message and any attachments.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards
2010-01-12 23:18 ` Benjamin Herrenschmidt
@ 2010-01-14 4:56 ` Benjamin Herrenschmidt
2010-01-19 22:52 ` Felix Radensky
0 siblings, 1 reply; 6+ messages in thread
From: Benjamin Herrenschmidt @ 2010-01-14 4:56 UTC (permalink / raw)
To: Stef van Os; +Cc: linuxppc-dev, Felix Radensky, Stefan Roese, Feng Kan
On Wed, 2010-01-13 at 10:18 +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2010-01-12 at 15:09 +0100, Stef van Os wrote:
> > This patch adds type 1 PCI transactions to 4xx PCI code, enabling the
> > discovery of
> > devices behind a PCI bridge.
>
> Your patch appears word wrapped and whitespace damaged...
>
> I'll fix it up manually this time around but please check your mailer
> setup :-)
Allright, it's not quite that.
I've looked at my docs, and it looks like older parts such as the 440EP
do -not- take the config type in the low bit.
More interestingly, they only generate config 0 cycles if you pass a bus
number of 0 :-)
So we'll need do do something a little bit different here. We probably
need to indicate in the device-tree what kind of SoC we have (whether
it supports the explicit bit to choose between type 0 and type 1 or
not).
If not, we should then set the "self_busno" field of the bridge to 0,
causing indirect_pci to always use bus number 0 when trying to talk
to the bus segment behind the bridge, whatever the linux bus number
for it actually is.
Now, we need to make a precise list here of what SoC uses what. 460xx
seem to all support the explicit bit. 440EP doesn't. What else ?
Somebody from AMCC can dbl check that ?
Cheers,
Ben.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards
2010-01-14 4:56 ` Benjamin Herrenschmidt
@ 2010-01-19 22:52 ` Felix Radensky
2010-01-19 22:57 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 6+ messages in thread
From: Felix Radensky @ 2010-01-19 22:52 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Stef van Os, Stefan Roese, Feng Kan, linuxppc-dev
Benjamin Herrenschmidt wrote:
> On Wed, 2010-01-13 at 10:18 +1100, Benjamin Herrenschmidt wrote:
>
>> On Tue, 2010-01-12 at 15:09 +0100, Stef van Os wrote:
>>
>>> This patch adds type 1 PCI transactions to 4xx PCI code, enabling the
>>> discovery of
>>> devices behind a PCI bridge.
>>>
>> Your patch appears word wrapped and whitespace damaged...
>>
>> I'll fix it up manually this time around but please check your mailer
>> setup :-)
>>
>
> Allright, it's not quite that.
>
> I've looked at my docs, and it looks like older parts such as the 440EP
> do -not- take the config type in the low bit.
>
> More interestingly, they only generate config 0 cycles if you pass a bus
> number of 0 :-)
>
> So we'll need do do something a little bit different here. We probably
> need to indicate in the device-tree what kind of SoC we have (whether
> it supports the explicit bit to choose between type 0 and type 1 or
> not).
>
> If not, we should then set the "self_busno" field of the bridge to 0,
> causing indirect_pci to always use bus number 0 when trying to talk
> to the bus segment behind the bridge, whatever the linux bus number
> for it actually is.
>
> Now, we need to make a precise list here of what SoC uses what. 460xx
> seem to all support the explicit bit. 440EP doesn't. What else ?
>
> Somebody from AMCC can dbl check that ?
>
I've checked what platforms take configuration type in the lower bit:
405XX - no
440EP - no
440GR - no
440EPx/440GRx - no
440GP - yes
440GX - yes
440SP - yes
440SPe - yes
460XX - yes
The distinction between these groups is pretty clear in the device trees.
The members of the first group all have "ibm,plb-pci" property, and all
members of second group have "ibm,plb-pcix" property.
So only ppc4xx_probe_pcix_bridge() routine should be fixed.
Felix.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards
2010-01-19 22:52 ` Felix Radensky
@ 2010-01-19 22:57 ` Benjamin Herrenschmidt
2010-01-20 11:21 ` Felix Radensky
0 siblings, 1 reply; 6+ messages in thread
From: Benjamin Herrenschmidt @ 2010-01-19 22:57 UTC (permalink / raw)
To: Felix Radensky; +Cc: Stef van Os, Stefan Roese, Feng Kan, linuxppc-dev
On Wed, 2010-01-20 at 00:52 +0200, Felix Radensky wrote:
>
> 405XX - no
> 440EP - no
> 440GR - no
> 440EPx/440GRx - no
>
> 440GP - yes
> 440GX - yes
> 440SP - yes
> 440SPe - yes
> 460XX - yes
>
> The distinction between these groups is pretty clear in the device trees.
> The members of the first group all have "ibm,plb-pci" property, and all
> members of second group have "ibm,plb-pcix" property.
>
> So only ppc4xx_probe_pcix_bridge() routine should be fixed.
Ah cool, I hadn't noticed that it matched the cell type.
Cheers,
Ben.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards
2010-01-19 22:57 ` Benjamin Herrenschmidt
@ 2010-01-20 11:21 ` Felix Radensky
0 siblings, 0 replies; 6+ messages in thread
From: Felix Radensky @ 2010-01-20 11:21 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Stef van Os, Stefan Roese, Feng Kan, linuxppc-dev
Hi, Stef
Benjamin Herrenschmidt wrote:
> On Wed, 2010-01-20 at 00:52 +0200, Felix Radensky wrote:
>
>> 405XX - no
>> 440EP - no
>> 440GR - no
>> 440EPx/440GRx - no
>>
>> 440GP - yes
>> 440GX - yes
>> 440SP - yes
>> 440SPe - yes
>> 460XX - yes
>>
>> The distinction between these groups is pretty clear in the device trees.
>> The members of the first group all have "ibm,plb-pci" property, and all
>> members of second group have "ibm,plb-pcix" property.
>>
>> So only ppc4xx_probe_pcix_bridge() routine should be fixed.
>>
>
> Ah cool, I hadn't noticed that it matched the cell type.
>
>
Can you please send an updated patch.
Thanks a lot.
Felix.
^ permalink raw reply [flat|nested] 6+ messages in thread
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2010-01-12 14:09 [PATCH] powerpc/4xx: Add support for type 1 pci transactions on 4xx boards Stef van Os
2010-01-12 23:18 ` Benjamin Herrenschmidt
2010-01-14 4:56 ` Benjamin Herrenschmidt
2010-01-19 22:52 ` Felix Radensky
2010-01-19 22:57 ` Benjamin Herrenschmidt
2010-01-20 11:21 ` Felix Radensky
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