* [PATCH 1/3] fsl_rio: fix compile errors
@ 2010-06-18 5:29 Li Yang
2010-06-18 5:29 ` [PATCH 2/3] fsl_rio: fix machine check exception for e500mc Li Yang
0 siblings, 1 reply; 5+ messages in thread
From: Li Yang @ 2010-06-18 5:29 UTC (permalink / raw)
To: galak, linuxppc-dev
Fixes the following compile problem on E500 platforms:
arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared (first use in this function)
Also fixes the compile problem on non-E500 platforms.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_rio.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 30e1626..f908ba6 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -240,12 +240,13 @@ struct rio_priv {
static void __iomem *rio_regs_win;
+#ifdef CONFIG_E500
static int (*saved_mcheck_exception)(struct pt_regs *regs);
static int fsl_rio_mcheck_exception(struct pt_regs *regs)
{
const struct exception_table_entry *entry = NULL;
- unsigned long reason = (mfspr(SPRN_MCSR) & MCSR_MASK);
+ unsigned long reason = mfspr(SPRN_MCSR);
if (reason & MCSR_BUS_RBERR) {
reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
@@ -269,6 +270,7 @@ static int fsl_rio_mcheck_exception(struct pt_regs *regs)
else
return cur_cpu_spec->machine_check(regs);
}
+#endif
/**
* fsl_rio_doorbell_send - Send a MPC85xx doorbell message
@@ -1517,8 +1519,10 @@ int fsl_rio_setup(struct of_device *dev)
fsl_rio_doorbell_init(port);
fsl_rio_port_write_init(port);
+#ifdef CONFIG_E500
saved_mcheck_exception = ppc_md.machine_check_exception;
ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
+#endif
/* Ensure that RFXE is set */
mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
--
1.6.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] fsl_rio: fix machine check exception for e500mc
2010-06-18 5:29 [PATCH 1/3] fsl_rio: fix compile errors Li Yang
@ 2010-06-18 5:29 ` Li Yang
2010-06-18 5:29 ` [PATCH 3/3] fsl_rio: fix non-standard HID1 register access Li Yang
0 siblings, 1 reply; 5+ messages in thread
From: Li Yang @ 2010-06-18 5:29 UTC (permalink / raw)
To: galak, linuxppc-dev
The original code only covers e500 v1/v2.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_rio.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index f908ba6..954a754 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -248,7 +248,8 @@ static int fsl_rio_mcheck_exception(struct pt_regs *regs)
const struct exception_table_entry *entry = NULL;
unsigned long reason = mfspr(SPRN_MCSR);
- if (reason & MCSR_BUS_RBERR) {
+ /* covers both e500v1/v2 and e500mc */
+ if (reason & (MCSR_BUS_RBERR | MCSR_LD)) {
reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
/* Check if we are prepared to handle this fault */
--
1.6.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] fsl_rio: fix non-standard HID1 register access
2010-06-18 5:29 ` [PATCH 2/3] fsl_rio: fix machine check exception for e500mc Li Yang
@ 2010-06-18 5:29 ` Li Yang
2010-06-18 5:46 ` Geert Uytterhoeven
0 siblings, 1 reply; 5+ messages in thread
From: Li Yang @ 2010-06-18 5:29 UTC (permalink / raw)
To: galak, linuxppc-dev
The access to HID1 register is only legitimate for e500 v1/v2 cores.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_rio.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 954a754..785a882 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -1523,9 +1523,12 @@ int fsl_rio_setup(struct of_device *dev)
#ifdef CONFIG_E500
saved_mcheck_exception = ppc_md.machine_check_exception;
ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
-#endif
- /* Ensure that RFXE is set */
+
+#ifndef CONFIG_E500MC
+ /* Ensure that RFXE is set on e500 v1/v2 */
mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
+#endif /* !E500MC */
+#endif /* E500 */
return 0;
err:
--
1.6.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 3/3] fsl_rio: fix non-standard HID1 register access
2010-06-18 5:29 ` [PATCH 3/3] fsl_rio: fix non-standard HID1 register access Li Yang
@ 2010-06-18 5:46 ` Geert Uytterhoeven
2010-06-18 5:51 ` Kumar Gala
0 siblings, 1 reply; 5+ messages in thread
From: Geert Uytterhoeven @ 2010-06-18 5:46 UTC (permalink / raw)
To: Li Yang; +Cc: linuxppc-dev
On Fri, Jun 18, 2010 at 07:29, Li Yang <leoli@freescale.com> wrote:
> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> =C2=A0arch/powerpc/sysdev/fsl_rio.c | =C2=A0 =C2=A07 +++++--
> =C2=A01 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.=
c
> index 954a754..785a882 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -1523,9 +1523,12 @@ int fsl_rio_setup(struct of_device *dev)
> =C2=A0#ifdef CONFIG_E500
> =C2=A0 =C2=A0 =C2=A0 =C2=A0saved_mcheck_exception =3D ppc_md.machine_chec=
k_exception;
> =C2=A0 =C2=A0 =C2=A0 =C2=A0ppc_md.machine_check_exception =3D fsl_rio_mch=
eck_exception;
> -#endif
> - =C2=A0 =C2=A0 =C2=A0 /* Ensure that RFXE is set */
> +
> +#ifndef CONFIG_E500MC
> + =C2=A0 =C2=A0 =C2=A0 /* Ensure that RFXE is set on e500 v1/v2 */
> =C2=A0 =C2=A0 =C2=A0 =C2=A0mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000))=
;
> +#endif /* !E500MC */
> +#endif /* E500 */
>
> =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0;
> =C2=A0err:
This prevents you from building a kernel for both normal E500 and E500MC.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k=
.org
In personal conversations with technical people, I call myself a hacker. Bu=
t
when I'm talking to journalists I just say "programmer" or something like t=
hat.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 3/3] fsl_rio: fix non-standard HID1 register access
2010-06-18 5:46 ` Geert Uytterhoeven
@ 2010-06-18 5:51 ` Kumar Gala
0 siblings, 0 replies; 5+ messages in thread
From: Kumar Gala @ 2010-06-18 5:51 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linuxppc-dev
On Jun 18, 2010, at 12:46 AM, Geert Uytterhoeven wrote:
> On Fri, Jun 18, 2010 at 07:29, Li Yang <leoli@freescale.com> wrote:
>> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>>
>> Signed-off-by: Li Yang <leoli@freescale.com>
>> ---
>> arch/powerpc/sysdev/fsl_rio.c | 7 +++++--
>> 1 files changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
>> index 954a754..785a882 100644
>> --- a/arch/powerpc/sysdev/fsl_rio.c
>> +++ b/arch/powerpc/sysdev/fsl_rio.c
>> @@ -1523,9 +1523,12 @@ int fsl_rio_setup(struct of_device *dev)
>> #ifdef CONFIG_E500
>> saved_mcheck_exception = ppc_md.machine_check_exception;
>> ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
>> -#endif
>> - /* Ensure that RFXE is set */
>> +
>> +#ifndef CONFIG_E500MC
>> + /* Ensure that RFXE is set on e500 v1/v2 */
>> mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
>> +#endif /* !E500MC */
>> +#endif /* E500 */
>>
>> return 0;
>> err:
>
> This prevents you from building a kernel for both normal E500 and E500MC.
>
> Gr{oetje,eeting}s,
Also, not a fan of the magic number 0x20000.
- k
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2010-06-18 5:51 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2010-06-18 5:29 [PATCH 1/3] fsl_rio: fix compile errors Li Yang
2010-06-18 5:29 ` [PATCH 2/3] fsl_rio: fix machine check exception for e500mc Li Yang
2010-06-18 5:29 ` [PATCH 3/3] fsl_rio: fix non-standard HID1 register access Li Yang
2010-06-18 5:46 ` Geert Uytterhoeven
2010-06-18 5:51 ` Kumar Gala
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