From: Nishanth Aravamudan <nacc@us.ibm.com>
To: nacc@us.ibm.com
Cc: Mark Nelson <markn@au1.ibm.com>,
linux-kernel@vger.kernel.org, miltonm@bga.com,
Paul Mackerras <paulus@samba.org>,
Anton Blanchard <anton@samba.org>,
Thomas Gleixner <tglx@linutronix.de>,
linuxppc-dev@lists.ozlabs.org
Subject: [RESEND PATCH 2/2] pseries/xics: use cpu_possible_mask rather than cpu_all_mask
Date: Fri, 1 Oct 2010 14:26:18 -0700 [thread overview]
Message-ID: <1285968378-12805-3-git-send-email-nacc@us.ibm.com> (raw)
In-Reply-To: <1285968378-12805-1-git-send-email-nacc@us.ibm.com>
Current firmware only allows us to send IRQs to the first processor or
all processors. We currently check to see if the passed in mask is equal
to the all_mask, but the firmware is only considering whether the
request is for the equivalent of the possible_mask. Thus, we think the
request is for some subset of CPUs and only assign IRQs to the first CPU
(on systems without irqbalance running) as evidenced by
/proc/interrupts. By using possible_mask instead, we account for this
and proper interleaving of interrupts occurs.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
---
arch/powerpc/platforms/pseries/xics.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 93834b0..7c1e342 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -178,7 +178,7 @@ static int get_irq_server(unsigned int virq, const struct cpumask *cpumask,
if (!distribute_irqs)
return default_server;
- if (!cpumask_equal(cpumask, cpu_all_mask)) {
+ if (!cpumask_subset(cpu_possible_mask, cpumask)) {
int server = cpumask_first_and(cpu_online_mask, cpumask);
if (server < nr_cpu_ids)
--
1.7.0.4
prev parent reply other threads:[~2010-10-01 21:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-01 21:26 [RESEND PATCH 0/2] Fix IRQ round-robing w/o irqbalance on pseries Nishanth Aravamudan
2010-10-01 21:26 ` Nishanth Aravamudan [this message]
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