From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Subject: Re: [PATCH 12/15] powerpc/book3e: Use way 3 for linear mapping bolted entry From: Benjamin Herrenschmidt To: Kumar Gala In-Reply-To: <7086A97F-A6A6-4D25-9FA7-20959C74E440@kernel.crashing.org> References: <1303162834.28876.163.camel@pasglop> <7086A97F-A6A6-4D25-9FA7-20959C74E440@kernel.crashing.org> Content-Type: text/plain; charset="UTF-8" Date: Tue, 19 Apr 2011 08:44:21 +1000 Message-ID: <1303166661.28876.165.camel@pasglop> Mime-Version: 1.0 Cc: Michael Ellerman , Jimi Xenidis , jack@codezen.org, imunsie@au.ibm.com, linuxppc-dev@ozlabs.org, David Gibson List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , > >> Seems like this should have a MMU Feature bit or something for A2. > > > > Too early. We haven't detected the CPU and are establishing the initial > > TLB entry here. > > How about wrapping with CONFIG_PPC_A2 YUCK :-) > > Any reason why that wouldn't work on something else anyways ? > > No, I wasn't paying attention to what this code exactly was (not enough > context in the diff), I see its our initial setup so not a big deal. > Was thinking this was run-time exception handler code. No, it's the boot time bolted entry. Cheers, Ben.