* Re: Kernel cannot see PCI device
2011-05-18 14:14 ` Kernel cannot see PCI device Bjorn Helgaas
@ 2011-05-19 12:41 ` Prashant Bhole
2011-05-19 17:58 ` Bjorn Helgaas
0 siblings, 1 reply; 9+ messages in thread
From: Prashant Bhole @ 2011-05-19 12:41 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: linux-pci, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1919 bytes --]
Hi,
On Wed, May 18, 2011 at 7:44 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> On Wed, May 18, 2011 at 4:02 AM, Prashant Bhole
> <prashantsmailcenter@gmail.com> wrote:
>> On Mon, May 2, 2011 at 10:21 AM, Prashant Bhole
>> <prashantsmailcenter@gmail.com> wrote:
>>>
>>> Hi,
>>> I have a custom made powerpc 460EX board. On that board u-boot
>>> can see a PCI device but Linux kernel cannot see it. What could be the problem?
>>>
>>> On u-boot "pci 2" commands displays following device:
>>> Scanning PCI devices on bus 2
>>> BusDevFun VendorId DeviceId Device Class Sub-Class
>>> _____________________________________________________________
>>> 02.00.00 0x1000 0x0072 Mass storage controller 0x00
>>>
>>> And when the kernel is booted, there is only one pci device (bridge):
>>> #ls /sys/bus/pci/devices
>>> 0000:80:00.0
>>>
>>
>> I am still facing in this problem.
>>
>> a call to pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l) returns
>> positive value in the function pci_scan_device(), which means VENDOR_ID reading
>> failed. I could not find the reason. Any hints?
>
> Hmm... probably powerpc-related, so I added linuxppc-dev.
>
> My guess would be that Linux didn't find the host bridge to the
> hierarchy containing bus 2. I would guess the host bridge info is
> supposed to come from OF. More information, like the complete u-boot
> PCI scan and the kernel dmesg log, would be useful. And maybe u-boot
> has a way to dump the OF device tree?
>
I am not using OF for booting u-boot. OF is being used for booting the kernel.
Not sure whether the host bridge info is coming from OF.
Device tree has two pciex nodes with following property:
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"
I think that node represents a pciex bus not the bridge.
I have attached u-boot, dmesg logs and device tree source
-Prashant
[-- Attachment #2: dmesg.txt --]
[-- Type: text/plain, Size: 11488 bytes --]
460ex #dmesg
<6>Using PowerPC 44x Platform machine description
<4>Only using first contiguous memory region
<5>Linux version 2.6.38.4 (root@stripe) (gcc version 4.3.4 (Buildroot 2010.02) ) #12 Thu May 19 16:51:17 IST 2011
<4>Found initrd at 0xefdff000:0xeffffc24
<7>Found legacy serial port 0 for /plb/opb/serial@ef600300
<7> mem=4ef600300, taddr=4ef600300, irq=0, clk=7407407, speed=0
<7>Found legacy serial port 1 for /plb/opb/serial@ef600400
<7> mem=4ef600400, taddr=4ef600400, irq=0, clk=7407407, speed=0
<7>Found legacy serial port 2 for /plb/opb/serial@ef600500
<7> mem=4ef600500, taddr=4ef600500, irq=0, clk=7407407, speed=0
<7>Found legacy serial port 3 for /plb/opb/serial@ef600600
<7> mem=4ef600600, taddr=4ef600600, irq=0, clk=7407407, speed=0
<7>Top of RAM: 0x30000000, Total RAM: 0x30000000
<7>Memory hole size: 0MB
<4>Zone PFN ranges:
<4> DMA 0x00000000 -> 0x00030000
<4> Normal empty
<4>Movable zone start PFN for each node
<4>early_node_map[1] active PFN ranges
<4> 0: 0x00000000 -> 0x00030000
<7>On node 0 totalpages: 196608
<7>free_area_init_node: node 0, pgdat c033b628, node_mem_map c045e000
<7> DMA zone: 1536 pages used for memmap
<7> DMA zone: 0 pages reserved
<7> DMA zone: 195072 pages, LIFO batch:31
<6>MMU: Allocated 1088 bytes of context maps for 255 contexts
<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
<7>pcpu-alloc: [0] 0
<4>Built 1 zonelists in Zone order, mobility grouping on. Total pages: 195072
<5>Kernel command line: root=/dev/ram rw console=ttyS0,115200
<6>PID hash table entries: 4096 (order: 2, 16384 bytes)
<6>Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
<6>Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
<6>Memory: 772860k/786432k available (3240k kernel code, 13572k reserved, 100k data, 1127k bss, 160k init)
<6>Kernel virtual memory layout:
<6> * 0xfffdf000..0xfffff000 : fixmap
<6> * 0xfde00000..0xfe000000 : consistent mem
<6> * 0xfde00000..0xfde00000 : early ioremap
<6> * 0xf1000000..0xfde00000 : vmalloc & ioremap
<6>SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
<6>NR_IRQS:512 nr_irqs:512 16
<4>UIC0 (32 IRQ sources) at DCR 0xc0
<4>UIC1 (32 IRQ sources) at DCR 0xd0
<7>irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
<4>UIC2 (32 IRQ sources) at DCR 0xe0
<7>irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
<4>UIC3 (32 IRQ sources) at DCR 0xf0
<7>irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
<7>time_init: decrementer frequency = 1000.000012 MHz
<7>time_init: processor frequency = 1000.000012 MHz
<6>clocksource: timebase mult[400000] shift[22] registered
<7>clockevent: decrementer mult[80000019] shift[31] cpu[0]
<6>pid_max: default: 32768 minimum: 301
<4>Mount-cache hash table entries: 512
<6>NET: Registered protocol family 16
<7>irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
<6>256k L2-cache enabled
<6>PCIE0: Port disabled via device-tree
<6>PCIE1: Checking link...
<6>PCIE1: Device detected, waiting for link...
<6>PCIE1: link is up !
<6>PCI host bridge /plb/pciex@d20000000 (primary) ranges:
<6> MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000
<6> MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000
<6> IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
<6> Removing ISA hole at 0x0000000f00100000
<6>4xx PCI DMA offset set to 0x00000000
<6>/plb/pciex@d20000000: Legacy ISA memory support enabled
<6>PCIE1: successfully set as root-complex
<6>PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
<6> MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000
<6> MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000
<6> IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
<6> Removing ISA hole at 0x0000000c0ee00000
<6>4xx PCI DMA offset set to 0x00000000
<6>/plb/pci@c0ec00000: Legacy ISA memory support enabled
<6>PCI: Probing PCI hardware
<7>pci_bus 0000:80: scanning bus
<7>pci 0000:80:00.0: [aaa1:bed1] type 1 class 0x000604
<7>pci 0000:80:00.0: calling quirk_mmio_always_on+0x0/0x24
<7>pci 0000:80:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
<7>pci 0000:80:00.0: calling pcibios_fixup_resources+0x0/0x174
<7>pci 0000:80:00.0: calling fixup_ppc4xx_pci_bridge+0x0/0x134
<6>PCI: Hiding 4xx host bridge resources 0000:80:00.0
<7>pci 0000:80:00.0: calling quirk_resource_alignment+0x0/0x1e0
<7>pci_bus 0000:80: fixups for bus
<7>pci 0000:80:00.0: scanning [bus 81-bf] behind bridge, pass 0
<7>pci_bus 0000:81: scanning bus
<7>pci_bus 0000:81: fixups for bus
<6>pci 0000:80:00.0: PCI bridge to [bus 81-bf]
<7>pci 0000:80:00.0: bridge window [io 0x0000-0x0000] (disabled)
<7>pci 0000:80:00.0: bridge window [mem 0xb8000000-0xb80fffff]
<7>pci 0000:80:00.0: bridge window [mem 0x10000000-0x000fffff pref] (disabled)
<7>pci_bus 0000:81: bus scan returning with max=81
<7>pci 0000:80:00.0: scanning [bus 81-bf] behind bridge, pass 1
<7>pci_bus 0000:80: bus scan returning with max=bf
<7>pci_bus 0001:00: scanning bus
<7>pci_bus 0001:00: fixups for bus
<7>pci_bus 0001:00: bus scan returning with max=00
<6>pci 0000:80:00.0: PCI bridge to [bus 81-bf]
<6>pci 0000:80:00.0: bridge window [io disabled]
<6>pci 0000:80:00.0: bridge window [mem disabled]
<6>pci 0000:80:00.0: bridge window [mem pref disabled]
<7>pci_bus 0000:80: resource 0 [io 0xfffe0000-0xfffeffff]
<7>pci_bus 0000:80: resource 1 [mem 0xe80000000-0xeffffffff]
<7>pci_bus 0001:00: resource 0 [io 0x0000-0xffff]
<7>pci_bus 0001:00: resource 1 [mem 0xd80000000-0xdffffffff]
<4>bio: create slab <bio-0> at 0
<6>vgaarb: loaded
<5>SCSI subsystem initialized
<6>Switching to clocksource timebase
<6>NET: Registered protocol family 2
<6>IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
<6>TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
<6>Switched to NOHz mode on CPU #0
<6>TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
<6>TCP: Hash tables configured (established 131072 bind 65536)
<6>TCP reno registered
<6>UDP hash table entries: 512 (order: 1, 8192 bytes)
<6>UDP-Lite hash table entries: 512 (order: 1, 8192 bytes)
<6>NET: Registered protocol family 1
<6>RPC: Registered udp transport module.
<6>RPC: Registered tcp transport module.
<6>RPC: Registered tcp NFSv4.1 backchannel transport module.
<7>pci 0000:80:00.0: calling quirk_cardbus_legacy+0x0/0x50
<7>pci 0000:80:00.0: calling quirk_usb_early_handoff+0x0/0x714
<7>PCI: CLS 32 bytes, default 32
<6>Trying to unpack rootfs image as initramfs...
<6>rootfs image is not initramfs (no cpio magic); looks like an initrd
<4>Freeing initrd memory: 2051k freed
<7>irq: irq 1 on host /interrupt-controller1 mapped to virtual irq 19
<7>irq: irq 1 on host /interrupt-controller0 mapped to virtual irq 20
<7>irq: irq 29 on host /interrupt-controller1 mapped to virtual irq 29
<7>irq: irq 30 on host /interrupt-controller1 mapped to virtual irq 21
<7>irq: irq 29 on host /interrupt-controller0 mapped to virtual irq 22
<7>irq: irq 6 on host /interrupt-controller2 mapped to virtual irq 23
<7>irq: irq 7 on host /interrupt-controller2 mapped to virtual irq 24
<7>irq: irq 3 on host /interrupt-controller2 mapped to virtual irq 25
<7>irq: irq 4 on host /interrupt-controller2 mapped to virtual irq 26
<7>irq: irq 5 on host /interrupt-controller2 mapped to virtual irq 27
<7>irq: irq 22 on host /interrupt-controller0 mapped to virtual irq 28
<7>irq: irq 21 on host /interrupt-controller0 mapped to virtual irq 31
<7>irq: irq 22 on host /interrupt-controller1 mapped to virtual irq 32
<7>irq: irq 6 on host /interrupt-controller1 mapped to virtual irq 33
<7>irq: irq 0 on host /interrupt-controller1 mapped to virtual irq 34
<7>irq: irq 18 on host /interrupt-controller0 mapped to virtual irq 35
<7>irq: irq 9 on host /interrupt-controller0 mapped to virtual irq 36
<7>irq: irq 20 on host /interrupt-controller3 mapped to virtual irq 37
<7>irq: irq 21 on host /interrupt-controller3 mapped to virtual irq 38
<7>irq: irq 21 on host /interrupt-controller1 mapped to virtual irq 39
<7>irq: irq 20 on host /interrupt-controller1 mapped to virtual irq 40
<7>irq: irq 2 on host /interrupt-controller2 mapped to virtual irq 41
<7>irq: irq 2 on host /interrupt-controller0 mapped to virtual irq 42
<7>irq: irq 3 on host /interrupt-controller0 mapped to virtual irq 43
<7>irq: irq 16 on host /interrupt-controller2 mapped to virtual irq 44
<7>irq: irq 20 on host /interrupt-controller2 mapped to virtual irq 45
<7>irq: irq 17 on host /interrupt-controller2 mapped to virtual irq 46
<7>irq: irq 21 on host /interrupt-controller2 mapped to virtual irq 47
<7>irq: irq 0 on host /interrupt-controller0 mapped to virtual irq 48
<3>setting trigger mode 3 for irq 42 failed (compat_irq_set_type+0x0/0x30)
<3>setting trigger mode 3 for irq 42 failed (compat_irq_set_type+0x0/0x30)
<6>ROMFS MTD (C) 2007 Red Hat, Inc.
<6>msgmni has been set to 1515
<6>Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
<6>io scheduler noop registered
<6>io scheduler deadline registered
<6>io scheduler cfq registered (default)
<6>pci_hotplug: PCI Hot Plug PCI Core version: 0.5
<6>Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
<6>serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 19) is a U6_16550A
<6>console [ttyS0] enabled
<6>serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 20) is a U6_16550A
<6>serial8250.0: ttyS2 at MMIO 0x4ef600500 (irq = 29) is a U6_16550A
<6>serial8250.0: ttyS3 at MMIO 0x4ef600600 (irq = 21) is a U6_16550A
<6>4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 19) is a 16550
<6>4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 20) is a 16550
<6>4ef600500.serial: ttyS2 at MMIO 0x4ef600500 (irq = 29) is a 16550
<6>4ef600600.serial: ttyS3 at MMIO 0x4ef600600 (irq = 21) is a 16550
<6>brd: module loaded
<6>mpt2sas version 07.100.00.00 loaded
<6>PPC 4xx OCP EMAC driver, version 3.54
<6>MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
<6>ZMII /plb/opb/emac-zmii@ef600d00 initialized
<6>RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
<6>TAH /plb/opb/emac-tah@ef601350 initialized
<6>TAH /plb/opb/emac-tah@ef601450 initialized
<5>/plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
<6>eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 12:34:56:78:cc:dd
<4>eth0: found Generic MII PHY (0x00)
<5>/plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
<6>eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 12:34:56:78:dc:dd
<4>eth1: found Generic MII PHY (0x01)
<6>i2c /dev entries driver
<6>of:ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
<7>irq: irq 25 on host /interrupt-controller2 mapped to virtual irq 49
<6>rtc-m41t80 0-0068: chip found, driver version 0.05
<6>rtc-m41t80 0-0068: rtc core: registered m41t80 as rtc0
<6>of:ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
<6>ad7414 0-0048: chip found
<4>ad7414 0-0048: ad7414_probe unable to read config register.
<6>TCP cubic registered
<6>NET: Registered protocol family 17
<6>rtc-m41t80 0-0068: setting system clock to 2071-09-15 11:14:52 UTC (3209541292)
<5>RAMDISK: gzip image found at block 0
<4>VFS: Mounted root (romfs filesystem) readonly on device 1:0.
<4>Freeing unused kernel memory: 160k init
<6>eth0: link is down
<6>eth1: link is down
<6>eth0: link is up, 100 FDX, pause enabled
460ex #
[-- Attachment #3: uboot_log.txt --]
[-- Type: text/plain, Size: 833 bytes --]
U-Boot 2009.08 (Apr 08 2011 - 18:08:03)
CPU: AMCC PowerPC 460EX Rev. B at 1000 MHz (PLB=200, OPB=100, EBC=100 MHz)
Security/Kasumi support
Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
Internal PCI arbiter disabled
32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 1*PCIe/1*SATA, Rev. 0
I2C: ready
DRAM: 1 GB (ECC not enabled, 400 MHz, CL3)
I2C channel 1 test:
SDRAM channel: OK
AT24C02 channel: OK
RTC channel: OK
W83793 channel: OK
FLASH: 8 MB
NAND: 256 MiB
PCI: Bus Dev VenId DevId Class Int
PCIE1: successfully set as root-complex
02 00 1000 0072 0100 00
DTT: 1 FAILED INIT
Net: ppc_4xx_eth0, ppc_4xx_eth1
Type run flash_nfs to mount root filesystem over NFS
Hit any key to stop autoboot: 5
[-- Attachment #4: canyonlands.dts --]
[-- Type: application/octet-stream, Size: 17676 bytes --]
/*
* Device Tree Source for AMCC Canyonlands (460EX)
*
* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,canyonlands";
compatible = "amcc,canyonlands";
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
ethernet1 = &EMAC1;
serial0 = &UART0;
serial1 = &UART1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,460EX";
reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <32768>;
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
next-level-cache = <&L2C0>;
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
};
nvram@4e4000000 {
compatible = "nvram";
device_type = "memory";
reg = <4 0xE4000000 0x20000>;
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC1: interrupt-controller1 {
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC2: interrupt-controller2 {
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <2>;
dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC3: interrupt-controller3 {
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <3>;
dcr-reg = <0x0f0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
OCM1: ocm@400040000 {
compatible = "ibm,ocm";
status = "enabled";
cell-index = <1>;
/* configured in U-Boot */
reg = <4 0x00040000 0x10000>; /* 64K */
};
SDR0: sdr {
compatible = "ibm,sdr-460ex";
dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-460ex";
dcr-reg = <0x00c 0x002>;
};
L2C0: l2c {
compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0x030 0x008>; /* L2 cache DCR's */
cache-line-size = <32>; /* 32 bytes */
cache-size = <262144>; /* L2, 256K */
interrupt-parent = <&UIC1>;
interrupts = <11 1>;
};
plb {
compatible = "ibm,plb-460ex", "ibm,plb4";
#address-cells = <2>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by U-Boot */
SDRAM0: sdram {
compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
dcr-reg = <0x010 0x002>;
};
CRYPTO: crypto@180000 {
compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
reg = <4 0x00180000 0x80400>;
interrupt-parent = <&UIC0>;
interrupts = <0x1d 0x4>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <16>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-parent = <&UIC2>;
interrupts = < /*TXEOB*/ 0x6 0x4
/*RXEOB*/ 0x7 0x4
/*SERR*/ 0x3 0x4
/*TXDE*/ 0x4 0x4
/*RXDE*/ 0x5 0x4>;
};
ADMA: adma {
compatible = "amcc,adma";
device_type = "dma";
reg = <4 00100200 80>;
interrupt-parent = <&ADMA>;
interrupts =<0 1 2>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*FIFO need service */ 0 &UIC0 0x16 4
/*FIFO FULL */ 1 &UIC0 0x15 4
/*FIFO HSDMA err */ 2 &UIC1 0x16 4>;
};
POB0: opb {
compatible = "ibm,opb-460ex", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-460ex", "ibm,ebc";
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;
interrupts = <0x6 0x4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
reg = <0x00000000 0x00000000 0x00800000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x00280000>;
};
partition@280000 {
label = "romfs";
reg = <0x00280000 0x00480000>;
};
partition@700000 {
label = "dtb";
reg = <0x00700000 0x00010000>;
};
partition@703000 {
label = "Reserved";
reg = <0x00710000 0x00070000>;
};
partition@770000 {
label = "env";
reg = <0x00780000 0x00020000>;
};
partition@790000 {
label = "u-boot";
reg = <0x007A0000 0x00060000>;
};
};
ndfc@1,0 {
compatible = "ibm,ndfc";
reg = <00000003 00000000 00002000>;
ccr = <0x00001000>;
bank-settings = <0x80002222>;
#address-cells = <1>;
#size-cells = <1>;
nand {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Free space";
reg = <0 0x10000000>;
};
};
};
};
EXT_INT0: ext_int0 {
compatible = "amcc,ext_int-460ex";
interrupt-parent = <&EXT_INT0>;
interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
reg = < 0xef600b00 0x80 /* GPIO 0 */
0xef600c00 0x80>; /* GPIO 1 */
interrupt-map = <0x0 &UIC1 0x00 0x2
0x1 &UIC0 0x12 0x2
0x2 &UIC0 0x9 0x2
0x3 &UIC3 0x14 0x2
0x4 &UIC3 0x15 0x2
0x5 &UIC1 0x1E 0x2
0x6 &UIC1 0x15 0x2
0x7 &UIC1 0x14 0x2
0x8 &UIC2 0x2 0x2>;
};
mute {
compatible = "mute";
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-parent = <&UIC3>;
interrupts = <0x14 0x2>;
};
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600400 0x00000008>;
virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC0>;
interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600500 0x00000008>;
virtual-reg = <0xef600500>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1d 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600600 0x00000008>;
virtual-reg = <0xef600600>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
interrupts = <0x1e 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-460ex", "ibm,iic";
reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
#address-cells = <1>;
#size-cells = <0>;
rtc@68 {
compatible = "stm,m41t80";
reg = <0x68>;
interrupt-parent = <&UIC2>;
interrupts = <0x19 0x8>;
};
sttm@48 {
compatible = "ad,ad7414";
reg = <0x48>;
interrupt-parent = <&UIC1>;
interrupts = <0x14 0x8>;
};
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-460ex", "ibm,iic";
reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x3 0x4>;
#address-cells = <1>;
#size-cells = <0>;
hwmonitor@2D {
compatible = "wb,w83793";
reg = <0x2D>;
/*interrupt-parent = <&UIC1>;*/
/*interrupts = <0x14 0x8>;*/
};
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-460ex", "ibm,zmii";
reg = <0xef600d00 0x0000000c>;
};
RGMII0: emac-rgmii@ef601500 {
compatible = "ibm,rgmii-460ex", "ibm,rgmii";
reg = <0xef601500 0x00000008>;
has-mdio;
};
TAH0: emac-tah@ef601350 {
compatible = "ibm,tah-460ex", "ibm,tah";
reg = <0xef601350 0x00000030>;
};
TAH1: emac-tah@ef601450 {
compatible = "ibm,tah-460ex", "ibm,tah";
reg = <0xef601450 0x00000030>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-460ex", "ibm,emac4sync";
interrupt-parent = <&EMAC0>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
/*Wake*/ 0x1 &UIC2 0x14 0x4>;
reg = <0xef600e00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
tah-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
EMAC1: ethernet@ef600f00 {
device_type = "network";
compatible = "ibm,emac-460ex", "ibm,emac4sync";
interrupt-parent = <&EMAC1>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
/*Wake*/ 0x1 &UIC2 0x15 0x4>;
reg = <0xef600f00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <8>;
cell-index = <1>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
tah-device = <&TAH1>;
tah-channel = <1>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
mdio-device = <&EMAC0>;
};
};
DMA: plb_dma@400300200 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "amcc,dma";
cell-index = <0>;
reg = <4 00300200 200>;
dcr-reg = <0x100 0x13f>;
interrupt-parent = <&UIC0>;
interrupts = <0 1 2 3>;
interrupt-map = < /*chan 0*/ 0 &UIC0 12 4
/* chan1*/ 1 &UIC0 13 4
/* chan2*/ 2 &UIC0 14 4
/* chan3*/ 3 &UIC0 15 4>;
dma-4channel@0{
compatible = "amcc,dma-4channel";
cell-index = <0>;
label = "channel0";
reg = <0x100 0x107>;
};
dma-4channel@1 {
compatible = "amcc,dma-4channel";
cell-index = <1>;
label = "channel1";
reg = <0x108 0x10f>;
};
dma-4channel@2 {
compatible = "amcc,dma-4channel";
cell-index = <2>;
label = "channel2";
reg = <0x110 0x117>;
};
dma-4channel@3 {
compatible = "amcc,dma-4channel";
cell-index = <3>;
label = "channel3";
reg = <0x118 0x11f>;
};
};
PCIX0: pci@c0ec00000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
primary;
large-inbound-windows;
enable-msi-hole;
reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
0x00000000 0x00000000 0x00000000 /* no IACK cycles */
0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0 to 0x3f */
bus-range = <0x0 0x3f>;
/* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
};
PCIE0: pciex@d00000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
primary;
port = <0x0>; /* port number */
reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
0x0000000c 0x08010000 0x00001000>; /* Registers */
dcr-reg = <0x100 0x020>;
sdr-base = <0x300>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 40 to 0x7f */
bus-range = <0x40 0x7f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
* We are de-swizzling here because the numbers are actually for
* port of the root complex virtual P2P bridge. But I want
* to avoid putting a node for it in the tree, so the numbers
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
};
PCIE1: pciex@d20000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
primary;
port = <0x1>; /* port number */
reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
0x0000000c 0x08011000 0x00001000>; /* Registers */
dcr-reg = <0x120 0x020>;
sdr-base = <0x340>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 80 to 0xbf */
bus-range = <0x80 0xbf>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
* We are de-swizzling here because the numbers are actually for
* port of the root complex virtual P2P bridge. But I want
* to avoid putting a node for it in the tree, so the numbers
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
};
};
};
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