* [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
@ 2011-10-13 15:20 Kumar Gala
0 siblings, 0 replies; 6+ messages in thread
From: Kumar Gala @ 2011-10-13 15:20 UTC (permalink / raw)
To: linuxppc-dev
Normally logical and hard cpu ID are the same, however in same cases like
on the P3060 they may differ. Where the logical is 0..5, the hard id
goes 0,1,4..7. This can causes issues for places we utilize PIR to index
into array like in debug exception handlers for finding the exception
stack.
Move to setting up PIR with hard_smp_processor_id fixes the issue.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/platforms/85xx/smp.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index d6e4746..190d111 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -48,10 +48,11 @@ smp_85xx_kick_cpu(int nr)
const u64 *cpu_rel_addr;
__iomem u32 *bptr_vaddr;
struct device_node *np;
- int n = 0;
+ int n = 0, hw_cpu = get_hard_smp_processor_id(nr);
int ioremappable;
- WARN_ON (nr < 0 || nr >= NR_CPUS);
+ WARN_ON(nr < 0 || nr >= NR_CPUS);
+ WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS);
pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
@@ -79,7 +80,7 @@ smp_85xx_kick_cpu(int nr)
local_irq_save(flags);
- out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
+ out_be32(bptr_vaddr + BOOT_ENTRY_PIR, hw_cpu);
#ifdef CONFIG_PPC32
out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
@@ -88,7 +89,7 @@ smp_85xx_kick_cpu(int nr)
(ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
/* Wait a bit for the CPU to ack. */
- while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
+ while ((__secondary_hold_acknowledge != hw_cpu) && (++n < 1000))
mdelay(1);
#else
smp_generic_kick_cpu(nr);
--
1.7.3.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
@ 2011-10-14 7:52 Kumar Gala
2011-10-20 3:53 ` Bhushan Bharat-R65777
2011-11-03 18:02 ` Kumar Gala
0 siblings, 2 replies; 6+ messages in thread
From: Kumar Gala @ 2011-10-14 7:52 UTC (permalink / raw)
To: linuxppc-dev
Normally logical and hard cpu ID are the same, however in same cases like
on the P3060 they may differ. Where the logical is 0..5, the hard id
goes 0,1,4..7. This can causes issues for places we utilize PIR to index
into array like in debug exception handlers for finding the exception
stack.
Move to setting up PIR with hard_smp_processor_id fixes the issue.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/platforms/85xx/smp.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index d6e4746..190d111 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -48,10 +48,11 @@ smp_85xx_kick_cpu(int nr)
const u64 *cpu_rel_addr;
__iomem u32 *bptr_vaddr;
struct device_node *np;
- int n = 0;
+ int n = 0, hw_cpu = get_hard_smp_processor_id(nr);
int ioremappable;
- WARN_ON (nr < 0 || nr >= NR_CPUS);
+ WARN_ON(nr < 0 || nr >= NR_CPUS);
+ WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS);
pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
@@ -79,7 +80,7 @@ smp_85xx_kick_cpu(int nr)
local_irq_save(flags);
- out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
+ out_be32(bptr_vaddr + BOOT_ENTRY_PIR, hw_cpu);
#ifdef CONFIG_PPC32
out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
@@ -88,7 +89,7 @@ smp_85xx_kick_cpu(int nr)
(ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
/* Wait a bit for the CPU to ack. */
- while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
+ while ((__secondary_hold_acknowledge != hw_cpu) && (++n < 1000))
mdelay(1);
#else
smp_generic_kick_cpu(nr);
--
1.7.3.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
2011-10-14 7:52 Kumar Gala
@ 2011-10-20 3:53 ` Bhushan Bharat-R65777
2011-10-20 4:02 ` Kumar Gala
2011-11-03 18:02 ` Kumar Gala
1 sibling, 1 reply; 6+ messages in thread
From: Bhushan Bharat-R65777 @ 2011-10-20 3:53 UTC (permalink / raw)
To: Kumar Gala, linuxppc-dev@ozlabs.org
> -----Original Message-----
> From: linuxppc-dev-bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.or=
g
> [mailto:linuxppc-dev-
> bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.org] On Behalf Of Kum=
ar
> Gala
> Sent: Friday, October 14, 2011 1:23 PM
> To: linuxppc-dev@ozlabs.org
> Subject: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
>=20
> Normally logical and hard cpu ID are the same, however in same cases like
> on the P3060 they may differ. Where the logical is 0..5, the hard id
> goes 0,1,4..7. This can causes issues for places we utilize PIR to index
> into array like in debug exception handlers for finding the exception
> stack.
Kumar, What should be the CONFIG_NR_CPUS for this? 8 or 6 ?
Thanks
-Bharat
>=20
> Move to setting up PIR with hard_smp_processor_id fixes the issue.
>=20
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/platforms/85xx/smp.c | 9 +++++----
> 1 files changed, 5 insertions(+), 4 deletions(-)
>=20
> diff --git a/arch/powerpc/platforms/85xx/smp.c
> b/arch/powerpc/platforms/85xx/smp.c
> index d6e4746..190d111 100644
> --- a/arch/powerpc/platforms/85xx/smp.c
> +++ b/arch/powerpc/platforms/85xx/smp.c
> @@ -48,10 +48,11 @@ smp_85xx_kick_cpu(int nr)
> const u64 *cpu_rel_addr;
> __iomem u32 *bptr_vaddr;
> struct device_node *np;
> - int n =3D 0;
> + int n =3D 0, hw_cpu =3D get_hard_smp_processor_id(nr);
> int ioremappable;
>=20
> - WARN_ON (nr < 0 || nr >=3D NR_CPUS);
> + WARN_ON(nr < 0 || nr >=3D NR_CPUS);
> + WARN_ON(hw_cpu < 0 || hw_cpu >=3D NR_CPUS);
>=20
> pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
>=20
> @@ -79,7 +80,7 @@ smp_85xx_kick_cpu(int nr)
>=20
> local_irq_save(flags);
>=20
> - out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
> + out_be32(bptr_vaddr + BOOT_ENTRY_PIR, hw_cpu);
> #ifdef CONFIG_PPC32
> out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
>=20
> @@ -88,7 +89,7 @@ smp_85xx_kick_cpu(int nr)
> (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
>=20
> /* Wait a bit for the CPU to ack. */
> - while ((__secondary_hold_acknowledge !=3D nr) && (++n < 1000))
> + while ((__secondary_hold_acknowledge !=3D hw_cpu) && (++n < 1000))
> mdelay(1);
> #else
> smp_generic_kick_cpu(nr);
> --
> 1.7.3.4
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
2011-10-20 3:53 ` Bhushan Bharat-R65777
@ 2011-10-20 4:02 ` Kumar Gala
2011-10-20 5:14 ` Bhushan Bharat-R65777
0 siblings, 1 reply; 6+ messages in thread
From: Kumar Gala @ 2011-10-20 4:02 UTC (permalink / raw)
To: Bhushan Bharat-R65777; +Cc: linuxppc-dev@ozlabs.org
On Oct 19, 2011, at 10:53 PM, Bhushan Bharat-R65777 wrote:
>
>
>> -----Original Message-----
>> From: linuxppc-dev-bounces+bharat.bhushan=freescale.com@lists.ozlabs.org
>> [mailto:linuxppc-dev-
>> bounces+bharat.bhushan=freescale.com@lists.ozlabs.org] On Behalf Of Kumar
>> Gala
>> Sent: Friday, October 14, 2011 1:23 PM
>> To: linuxppc-dev@ozlabs.org
>> Subject: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
>>
>> Normally logical and hard cpu ID are the same, however in same cases like
>> on the P3060 they may differ. Where the logical is 0..5, the hard id
>> goes 0,1,4..7. This can causes issues for places we utilize PIR to index
>> into array like in debug exception handlers for finding the exception
>> stack.
>
> Kumar, What should be the CONFIG_NR_CPUS for this? 8 or 6 ?
8.
- k
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
2011-10-20 4:02 ` Kumar Gala
@ 2011-10-20 5:14 ` Bhushan Bharat-R65777
0 siblings, 0 replies; 6+ messages in thread
From: Bhushan Bharat-R65777 @ 2011-10-20 5:14 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org
> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Thursday, October 20, 2011 9:32 AM
> To: Bhushan Bharat-R65777
> Cc: linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard
> SMP id
>=20
>=20
> On Oct 19, 2011, at 10:53 PM, Bhushan Bharat-R65777 wrote:
>=20
> >
> >
> >> -----Original Message-----
> >> From:
> >> linuxppc-dev-bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.org
> >> [mailto:linuxppc-dev-
> >> bounces+bharat.bhushan=3Dfreescale.com@lists.ozlabs.org] On Behalf Of
> >> bounces+Kumar
> >> Gala
> >> Sent: Friday, October 14, 2011 1:23 PM
> >> To: linuxppc-dev@ozlabs.org
> >> Subject: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard
> >> SMP id
> >>
> >> Normally logical and hard cpu ID are the same, however in same cases
> >> like on the P3060 they may differ. Where the logical is 0..5, the
> >> hard id goes 0,1,4..7. This can causes issues for places we utilize
> >> PIR to index into array like in debug exception handlers for finding
> >> the exception stack.
> >
> > Kumar, What should be the CONFIG_NR_CPUS for this? 8 or 6 ?
>=20
> 8.
Kumar, I am just trying to understand the impact of setting NR_CPUS =3D 8 w=
hile actual cpus are 6 only.
If I understood correctly, cpu_present, cpu_online are logical cpuid bit ma=
p. Also the PACA is allocated for nr_cpu_ids (NR_CPUS) and also indexed by =
logical cpuid. While they have knowledge of physical_cpuid.
So in this case last two entries of PACA will not be used or wasted?
I am not sure I am missing something here?
Thanks
-Bharat
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] powerpc/85xx: Setup secondary cores PIR with hard SMP id
2011-10-14 7:52 Kumar Gala
2011-10-20 3:53 ` Bhushan Bharat-R65777
@ 2011-11-03 18:02 ` Kumar Gala
1 sibling, 0 replies; 6+ messages in thread
From: Kumar Gala @ 2011-11-03 18:02 UTC (permalink / raw)
To: linuxppc-dev
On Oct 14, 2011, at 2:52 AM, Kumar Gala wrote:
> Normally logical and hard cpu ID are the same, however in same cases like
> on the P3060 they may differ. Where the logical is 0..5, the hard id
> goes 0,1,4..7. This can causes issues for places we utilize PIR to index
> into array like in debug exception handlers for finding the exception
> stack.
>
> Move to setting up PIR with hard_smp_processor_id fixes the issue.
>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/platforms/85xx/smp.c | 9 +++++----
> 1 files changed, 5 insertions(+), 4 deletions(-)
applied
- k
^ permalink raw reply [flat|nested] 6+ messages in thread
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2011-11-03 18:02 ` Kumar Gala
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