[PATCH 1/2] Unify pci/pcie initialization code

[PATCH 1/2] Unify pci/pcie initialization code

[Jia Hongtao]

In previous version pci/pcie initialization is in platform code which
Initialize PCI bridge base on EP/RC or host/agent settings.
We unified pci/pcie initialization as common APIs named fsl_pci_setup
which can be called by platform code.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
We only changed MPC85xxDS board as an example.
If no problem in the review we will change other boards also.

 arch/powerpc/platforms/85xx/mpc85xx_ds.c |   30 ++-----------------
 arch/powerpc/sysdev/fsl_pci.c            |   48 ++++++++++++++++++++++++++++++
 arch/powerpc/sysdev/fsl_pci.h            |    5 +++
 3 files changed, 56 insertions(+), 27 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 10e7db0..7188c0b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -157,33 +157,12 @@ extern void __init mpc85xx_smp_init(void);
 #endif
 static void __init mpc85xx_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-	struct device_node *np;
-	struct pci_controller *hose;
-#endif
-	dma_addr_t max = 0xffffffff;
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-	for_each_node_by_type(np, "pci") {
-		if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-		    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
-		    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-			struct resource rsrc;
-			of_address_to_resource(np, 0, &rsrc);
-			if ((rsrc.start & 0xfffff) == primary_phb_addr)
-				fsl_add_bridge(np, 1);
-			else
-				fsl_add_bridge(np, 0);
-
-			hose = pci_find_hose_for_OF_device(np);
-			max = min(max, hose->dma_window_base_cur +
-					hose->dma_window_size);
-		}
-	}
+	fsl_pci_setup(primary_phb_addr);
 
+#ifdef CONFIG_PCI
 	ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
@@ -192,11 +171,8 @@ static void __init mpc85xx_ds_setup_arch(void)
 #endif
 
 #ifdef CONFIG_SWIOTLB
-	if (memblock_end_of_DRAM() > max) {
+	if (memblock_end_of_DRAM() > 0xffffffff)
 		ppc_swiotlb_enable = 1;
-		set_pci_dma_ops(&swiotlb_dma_ops);
-		ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-	}
 #endif
 
 	printk("MPC85xx DS board from Freescale Semiconductor\n");
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 80b8b7a..4d4536f 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -402,6 +402,54 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 }
 #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
 
+static struct of_device_id pci_ids[] = {
+	{ .compatible = "fsl,mpc8540-pci", },
+	{ .compatible = "fsl,mpc8548-pcie", },
+	{},
+};
+
+/**
+ * fsl_pci_setup - Initialization for PCI
+ * @primary_phb_addr: primary bus address
+ *
+ * Add bridge if pci controller is a host
+ */
+void fsl_pci_setup(int primary_phb_addr)
+{
+	struct device_node *np;
+	struct pci_controller *hose;
+	dma_addr_t min_dma_addr = 0xffffffff;
+
+	for_each_node_by_type(np, "pci") {
+		if (of_match_node(pci_ids, np)) {
+			struct resource rsrc;
+			of_address_to_resource(np, 0, &rsrc);
+			if ((rsrc.start & 0xfffff) == primary_phb_addr)
+				fsl_add_bridge(np, 1);
+			else
+				fsl_add_bridge(np, 0);
+
+			hose = pci_find_hose_for_OF_device(np);
+			min_dma_addr = min(min_dma_addr,
+					hose->dma_window_base_cur
+					+ hose->dma_window_size);
+
+		}
+	}
+
+#ifdef CONFIG_SWIOTLB
+	/*
+	 * if we couldn't map all of DRAM via the dma windows we need SWIOTLB
+	 * to handle buffers located outside of dma capable memory region
+	 */
+	if (memblock_end_of_DRAM() > min_dma_addr) {
+		ppc_swiotlb_enable = 1;
+		set_pci_dma_ops(&swiotlb_dma_ops);
+		ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+	}
+#endif
+}
+
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pcie_header);
 
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5c..775ea21 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -89,6 +89,11 @@ struct ccsr_pci {
 };
 
 extern int fsl_add_bridge(struct device_node *dev, int is_primary);
+#ifndef CONFIG_PCI
+#define fsl_pci_setup(p)
+#else
+extern void fsl_pci_setup(int primary_phb_addr);
+#endif
 extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
 extern int mpc83xx_add_bridge(struct device_node *dev);
 u64 fsl_pci_immrbar_base(struct pci_controller *hose);
-- 
1.7.5.1

[PATCH 2/2] powerpc/fsl-pci: Only scan PCI bus if configured as a host

[Jia Hongtao]

If we're an agent/end-point or fsl_add_bridge doesn't succeed due to some
resource failure we should not scan the PCI bus. We change fsl_add_bridge()
to return -ENODEV in the case we're an agent/end-point.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/sysdev/fsl_pci.c |   17 ++++++++++-------
 1 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4d4536f..caa7801 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -370,7 +370,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 			iounmap(hose->cfg_data);
 		iounmap(hose->cfg_addr);
 		pcibios_free_controller(hose);
-		return 0;
+		return -ENODEV;
 	}
 
 	setup_pci_cmd(hose);
@@ -418,6 +418,7 @@ void fsl_pci_setup(int primary_phb_addr)
 {
 	struct device_node *np;
 	struct pci_controller *hose;
+	int ret;
 	dma_addr_t min_dma_addr = 0xffffffff;
 
 	for_each_node_by_type(np, "pci") {
@@ -425,14 +426,16 @@ void fsl_pci_setup(int primary_phb_addr)
 			struct resource rsrc;
 			of_address_to_resource(np, 0, &rsrc);
 			if ((rsrc.start & 0xfffff) == primary_phb_addr)
-				fsl_add_bridge(np, 1);
+				ret = fsl_add_bridge(np, 1);
 			else
-				fsl_add_bridge(np, 0);
+				ret = fsl_add_bridge(np, 0);
 
-			hose = pci_find_hose_for_OF_device(np);
-			min_dma_addr = min(min_dma_addr,
-					hose->dma_window_base_cur
-					+ hose->dma_window_size);
+			if (ret == 0) {
+				hose = pci_find_hose_for_OF_device(np);
+				min_dma_addr = min(min_dma_addr,
+						hose->dma_window_base_cur
+						+ hose->dma_window_size);
+			}
 
 		}
 	}
-- 
1.7.5.1

Re: [PATCH 2/2] powerpc/fsl-pci: Only scan PCI bus if configured as a host

[Kumar Gala]

On Oct 28, 2011, at 3:03 AM, Jia Hongtao wrote:

> If we're an agent/end-point or fsl_add_bridge doesn't succeed due to =
some
> resource failure we should not scan the PCI bus. We change =
fsl_add_bridge()
> to return -ENODEV in the case we're an agent/end-point.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c |   17 ++++++++++-------
> 1 files changed, 10 insertions(+), 7 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c
> index 4d4536f..caa7801 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -370,7 +370,7 @@ int __init fsl_add_bridge(struct device_node *dev, =
int is_primary)
> 			iounmap(hose->cfg_data);
> 		iounmap(hose->cfg_addr);
> 		pcibios_free_controller(hose);
> -		return 0;
> +		return -ENODEV;
> 	}
>=20
> 	setup_pci_cmd(hose);
> @@ -418,6 +418,7 @@ void fsl_pci_setup(int primary_phb_addr)
> {
> 	struct device_node *np;
> 	struct pci_controller *hose;
> +	int ret;
> 	dma_addr_t min_dma_addr =3D 0xffffffff;
>=20
> 	for_each_node_by_type(np, "pci") {
> @@ -425,14 +426,16 @@ void fsl_pci_setup(int primary_phb_addr)
> 			struct resource rsrc;
> 			of_address_to_resource(np, 0, &rsrc);
> 			if ((rsrc.start & 0xfffff) =3D=3D =
primary_phb_addr)
> -				fsl_add_bridge(np, 1);
> +				ret =3D fsl_add_bridge(np, 1);
> 			else
> -				fsl_add_bridge(np, 0);
> +				ret =3D fsl_add_bridge(np, 0);
>=20
> -			hose =3D pci_find_hose_for_OF_device(np);
> -			min_dma_addr =3D min(min_dma_addr,
> -					hose->dma_window_base_cur
> -					+ hose->dma_window_size);
> +			if (ret =3D=3D 0) {
> +				hose =3D =
pci_find_hose_for_OF_device(np);
> +				min_dma_addr =3D min(min_dma_addr,
> +						=
hose->dma_window_base_cur
> +						+ =
hose->dma_window_size);
> +			}
>=20
> 		}
> 	}

In the failure case (i.e. when ret !=3D 0), what about the following =
code:

+#ifdef CONFIG_SWIOTLB
+	/*
+	 * if we couldn't map all of DRAM via the dma windows we need =
SWIOTLB
+	 * to handle buffers located outside of dma capable memory =
region
+	 */
+	if (memblock_end_of_DRAM() > min_dma_addr) {
+		ppc_swiotlb_enable =3D 1;
+		set_pci_dma_ops(&swiotlb_dma_ops);
+		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
+	}
+#endif

This should get updated to be:
	if ((ret =3D=3D 0) && (memblock_end_of_DRAM() > min_dma_arr)) {

[PATCH 1/2] Unify pci/pcie initialization code

[Jia Hongtao]

In previous version pci/pcie initialization is in platform code which
Initialize PCI bridge base on EP/RC or host/agent settings.
We unified pci/pcie initialization as common APIs named fsl_pci_setup
which can be called by platform code.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/platforms/85xx/mpc85xx_ds.c |   30 ++-----------------
 arch/powerpc/sysdev/fsl_pci.c            |   48 ++++++++++++++++++++++++++++++
 arch/powerpc/sysdev/fsl_pci.h            |    5 +++
 3 files changed, 56 insertions(+), 27 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 10e7db0..7188c0b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -157,33 +157,12 @@ extern void __init mpc85xx_smp_init(void);
 #endif
 static void __init mpc85xx_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-	struct device_node *np;
-	struct pci_controller *hose;
-#endif
-	dma_addr_t max = 0xffffffff;
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-	for_each_node_by_type(np, "pci") {
-		if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-		    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
-		    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-			struct resource rsrc;
-			of_address_to_resource(np, 0, &rsrc);
-			if ((rsrc.start & 0xfffff) == primary_phb_addr)
-				fsl_add_bridge(np, 1);
-			else
-				fsl_add_bridge(np, 0);
-
-			hose = pci_find_hose_for_OF_device(np);
-			max = min(max, hose->dma_window_base_cur +
-					hose->dma_window_size);
-		}
-	}
+	fsl_pci_setup(primary_phb_addr);
 
+#ifdef CONFIG_PCI
 	ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
@@ -192,11 +171,8 @@ static void __init mpc85xx_ds_setup_arch(void)
 #endif
 
 #ifdef CONFIG_SWIOTLB
-	if (memblock_end_of_DRAM() > max) {
+	if (memblock_end_of_DRAM() > 0xffffffff)
 		ppc_swiotlb_enable = 1;
-		set_pci_dma_ops(&swiotlb_dma_ops);
-		ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-	}
 #endif
 
 	printk("MPC85xx DS board from Freescale Semiconductor\n");
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 80b8b7a..4d4536f 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -402,6 +402,54 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 }
 #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
 
+static struct of_device_id pci_ids[] = {
+	{ .compatible = "fsl,mpc8540-pci", },
+	{ .compatible = "fsl,mpc8548-pcie", },
+	{},
+};
+
+/**
+ * fsl_pci_setup - Initialization for PCI
+ * @primary_phb_addr: primary bus address
+ *
+ * Add bridge if pci controller is a host
+ */
+void fsl_pci_setup(int primary_phb_addr)
+{
+	struct device_node *np;
+	struct pci_controller *hose;
+	dma_addr_t min_dma_addr = 0xffffffff;
+
+	for_each_node_by_type(np, "pci") {
+		if (of_match_node(pci_ids, np)) {
+			struct resource rsrc;
+			of_address_to_resource(np, 0, &rsrc);
+			if ((rsrc.start & 0xfffff) == primary_phb_addr)
+				fsl_add_bridge(np, 1);
+			else
+				fsl_add_bridge(np, 0);
+
+			hose = pci_find_hose_for_OF_device(np);
+			min_dma_addr = min(min_dma_addr,
+					hose->dma_window_base_cur
+					+ hose->dma_window_size);
+
+		}
+	}
+
+#ifdef CONFIG_SWIOTLB
+	/*
+	 * if we couldn't map all of DRAM via the dma windows we need SWIOTLB
+	 * to handle buffers located outside of dma capable memory region
+	 */
+	if (memblock_end_of_DRAM() > min_dma_addr) {
+		ppc_swiotlb_enable = 1;
+		set_pci_dma_ops(&swiotlb_dma_ops);
+		ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+	}
+#endif
+}
+
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pcie_header);
 
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5c..775ea21 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -89,6 +89,11 @@ struct ccsr_pci {
 };
 
 extern int fsl_add_bridge(struct device_node *dev, int is_primary);
+#ifndef CONFIG_PCI
+#define fsl_pci_setup(p)
+#else
+extern void fsl_pci_setup(int primary_phb_addr);
+#endif
 extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
 extern int mpc83xx_add_bridge(struct device_node *dev);
 u64 fsl_pci_immrbar_base(struct pci_controller *hose);
-- 
1.7.5.1

RE: [PATCH 2/2] powerpc/fsl-pci: Only scan PCI bus if configured as a host

[Jia Hongtao-B38951]

-----Original Message-----
From: linuxppc-dev-bounces+b38951=3Dfreescale.com@lists.ozlabs.org [mailto:=
linuxppc-dev-bounces+b38951=3Dfreescale.com@lists.ozlabs.org] On Behalf Of =
Kumar Gala
Sent: Friday, October 28, 2011 9:10 PM
To: Jia Hongtao-B38951
Cc: Gala Kumar-B11780; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 2/2] powerpc/fsl-pci: Only scan PCI bus if configured a=
s a host


On Oct 28, 2011, at 3:03 AM, Jia Hongtao wrote:

> If we're an agent/end-point or fsl_add_bridge doesn't succeed due to=20
> some resource failure we should not scan the PCI bus. We change=20
> fsl_add_bridge() to return -ENODEV in the case we're an agent/end-point.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c |   17 ++++++++++-------
> 1 files changed, 10 insertions(+), 7 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_pci.c=20
> b/arch/powerpc/sysdev/fsl_pci.c index 4d4536f..caa7801 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -370,7 +370,7 @@ int __init fsl_add_bridge(struct device_node *dev, in=
t is_primary)
> 			iounmap(hose->cfg_data);
> 		iounmap(hose->cfg_addr);
> 		pcibios_free_controller(hose);
> -		return 0;
> +		return -ENODEV;
> 	}
>=20
> 	setup_pci_cmd(hose);
> @@ -418,6 +418,7 @@ void fsl_pci_setup(int primary_phb_addr) {
> 	struct device_node *np;
> 	struct pci_controller *hose;
> +	int ret;
> 	dma_addr_t min_dma_addr =3D 0xffffffff;
>=20
> 	for_each_node_by_type(np, "pci") {
> @@ -425,14 +426,16 @@ void fsl_pci_setup(int primary_phb_addr)
> 			struct resource rsrc;
> 			of_address_to_resource(np, 0, &rsrc);
> 			if ((rsrc.start & 0xfffff) =3D=3D primary_phb_addr)
> -				fsl_add_bridge(np, 1);
> +				ret =3D fsl_add_bridge(np, 1);
> 			else
> -				fsl_add_bridge(np, 0);
> +				ret =3D fsl_add_bridge(np, 0);
>=20
> -			hose =3D pci_find_hose_for_OF_device(np);
> -			min_dma_addr =3D min(min_dma_addr,
> -					hose->dma_window_base_cur
> -					+ hose->dma_window_size);
> +			if (ret =3D=3D 0) {
> +				hose =3D pci_find_hose_for_OF_device(np);
> +				min_dma_addr =3D min(min_dma_addr,
> +						hose->dma_window_base_cur
> +						+ hose->dma_window_size);
> +			}
>=20
> 		}
> 	}

In the failure case (i.e. when ret !=3D 0), what about the following code:

+#ifdef CONFIG_SWIOTLB
+	/*
+	 * if we couldn't map all of DRAM via the dma windows we need SWIOTLB
+	 * to handle buffers located outside of dma capable memory region
+	 */
+	if (memblock_end_of_DRAM() > min_dma_addr) {
+		ppc_swiotlb_enable =3D 1;
+		set_pci_dma_ops(&swiotlb_dma_ops);
+		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
+	}
+#endif

This should get updated to be:
	if ((ret =3D=3D 0) && (memblock_end_of_DRAM() > min_dma_arr)) {
[Jia Hongtao-B38951] A board could have more than one pci controllers, so t=
his update is not right for it only checked the last one. I will submit ano=
ther patch to solve this issue.

_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

RE: [PATCH 1/2] Unify pci/pcie initialization code

[Jia Hongtao-B38951]

Hi Kumar,
We want more comments on this series of patches ([1/2] & [2/2]) to speed up=
 the pushing-to-kernel progress.
Thanks.

-----Original Message-----
From: Jia Hongtao-B38951=20
Sent: Monday, October 31, 2011 1:55 PM
To: linuxppc-dev@lists.ozlabs.org
Cc: Li Yang-R58472; Gala Kumar-B11780; Jia Hongtao-B38951
Subject: [PATCH 1/2] Unify pci/pcie initialization code

In previous version pci/pcie initialization is in platform code which Initi=
alize PCI bridge base on EP/RC or host/agent settings.
We unified pci/pcie initialization as common APIs named fsl_pci_setup which=
 can be called by platform code.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/platforms/85xx/mpc85xx_ds.c |   30 ++-----------------
 arch/powerpc/sysdev/fsl_pci.c            |   48 ++++++++++++++++++++++++++=
++++
 arch/powerpc/sysdev/fsl_pci.h            |    5 +++
 3 files changed, 56 insertions(+), 27 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platfo=
rms/85xx/mpc85xx_ds.c
index 10e7db0..7188c0b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -157,33 +157,12 @@ extern void __init mpc85xx_smp_init(void);  #endif  s=
tatic void __init mpc85xx_ds_setup_arch(void)  { -#ifdef CONFIG_PCI
-	struct device_node *np;
-	struct pci_controller *hose;
-#endif
-	dma_addr_t max =3D 0xffffffff;
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
=20
-#ifdef CONFIG_PCI
-	for_each_node_by_type(np, "pci") {
-		if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-		    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
-		    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-			struct resource rsrc;
-			of_address_to_resource(np, 0, &rsrc);
-			if ((rsrc.start & 0xfffff) =3D=3D primary_phb_addr)
-				fsl_add_bridge(np, 1);
-			else
-				fsl_add_bridge(np, 0);
-
-			hose =3D pci_find_hose_for_OF_device(np);
-			max =3D min(max, hose->dma_window_base_cur +
-					hose->dma_window_size);
-		}
-	}
+	fsl_pci_setup(primary_phb_addr);
=20
+#ifdef CONFIG_PCI
 	ppc_md.pci_exclude_device =3D mpc85xx_exclude_device;  #endif
=20
@@ -192,11 +171,8 @@ static void __init mpc85xx_ds_setup_arch(void)  #endif
=20
 #ifdef CONFIG_SWIOTLB
-	if (memblock_end_of_DRAM() > max) {
+	if (memblock_end_of_DRAM() > 0xffffffff)
 		ppc_swiotlb_enable =3D 1;
-		set_pci_dma_ops(&swiotlb_dma_ops);
-		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
-	}
 #endif
=20
 	printk("MPC85xx DS board from Freescale Semiconductor\n"); diff --git a/a=
rch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 80b8b7a.=
.4d4536f 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -402,6 +402,54 @@ int __init fsl_add_bridge(struct device_node *dev, int=
 is_primary)  }  #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
=20
+static struct of_device_id pci_ids[] =3D {
+	{ .compatible =3D "fsl,mpc8540-pci", },
+	{ .compatible =3D "fsl,mpc8548-pcie", },
+	{},
+};
+
+/**
+ * fsl_pci_setup - Initialization for PCI
+ * @primary_phb_addr: primary bus address
+ *
+ * Add bridge if pci controller is a host  */ void fsl_pci_setup(int=20
+primary_phb_addr) {
+	struct device_node *np;
+	struct pci_controller *hose;
+	dma_addr_t min_dma_addr =3D 0xffffffff;
+
+	for_each_node_by_type(np, "pci") {
+		if (of_match_node(pci_ids, np)) {
+			struct resource rsrc;
+			of_address_to_resource(np, 0, &rsrc);
+			if ((rsrc.start & 0xfffff) =3D=3D primary_phb_addr)
+				fsl_add_bridge(np, 1);
+			else
+				fsl_add_bridge(np, 0);
+
+			hose =3D pci_find_hose_for_OF_device(np);
+			min_dma_addr =3D min(min_dma_addr,
+					hose->dma_window_base_cur
+					+ hose->dma_window_size);
+
+		}
+	}
+
+#ifdef CONFIG_SWIOTLB
+	/*
+	 * if we couldn't map all of DRAM via the dma windows we need SWIOTLB
+	 * to handle buffers located outside of dma capable memory region
+	 */
+	if (memblock_end_of_DRAM() > min_dma_addr) {
+		ppc_swiotlb_enable =3D 1;
+		set_pci_dma_ops(&swiotlb_dma_ops);
+		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
+	}
+#endif
+}
+
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pc=
ie_header);
=20
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) diff --git a/a=
rch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index a39ed5c.=
.775ea21 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -89,6 +89,11 @@ struct ccsr_pci {
 };
=20
 extern int fsl_add_bridge(struct device_node *dev, int is_primary);
+#ifndef CONFIG_PCI
+#define fsl_pci_setup(p)
+#else
+extern void fsl_pci_setup(int primary_phb_addr); #endif
 extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);  extern int mpc83x=
x_add_bridge(struct device_node *dev);
 u64 fsl_pci_immrbar_base(struct pci_controller *hose);
--
1.7.5.1

RE: [PATCH 1/2] Unify pci/pcie initialization code

[Jia Hongtao-B38951]

Hi Kumar,
If the patch is ok we will apply the patch into other platforms.
Thanks.

-----Original Message-----
From: Jia Hongtao-B38951=20
Sent: Tuesday, November 22, 2011 2:21 PM
To: Jia Hongtao-B38951; linuxppc-dev@lists.ozlabs.org
Cc: Li Yang-R58472; Gala Kumar-B11780
Subject: RE: [PATCH 1/2] Unify pci/pcie initialization code

Hi Kumar,
We want more comments on this series of patches ([1/2] & [2/2]) to speed up=
 the pushing-to-kernel progress.
Thanks.

-----Original Message-----
From: Jia Hongtao-B38951=20
Sent: Monday, October 31, 2011 1:55 PM
To: linuxppc-dev@lists.ozlabs.org
Cc: Li Yang-R58472; Gala Kumar-B11780; Jia Hongtao-B38951
Subject: [PATCH 1/2] Unify pci/pcie initialization code

In previous version pci/pcie initialization is in platform code which Initi=
alize PCI bridge base on EP/RC or host/agent settings.
We unified pci/pcie initialization as common APIs named fsl_pci_setup which=
 can be called by platform code.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/platforms/85xx/mpc85xx_ds.c |   30 ++-----------------
 arch/powerpc/sysdev/fsl_pci.c            |   48 ++++++++++++++++++++++++++=
++++
 arch/powerpc/sysdev/fsl_pci.h            |    5 +++
 3 files changed, 56 insertions(+), 27 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platfo=
rms/85xx/mpc85xx_ds.c
index 10e7db0..7188c0b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -157,33 +157,12 @@ extern void __init mpc85xx_smp_init(void);  #endif  s=
tatic void __init mpc85xx_ds_setup_arch(void)  { -#ifdef CONFIG_PCI
-	struct device_node *np;
-	struct pci_controller *hose;
-#endif
-	dma_addr_t max =3D 0xffffffff;
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
=20
-#ifdef CONFIG_PCI
-	for_each_node_by_type(np, "pci") {
-		if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-		    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
-		    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-			struct resource rsrc;
-			of_address_to_resource(np, 0, &rsrc);
-			if ((rsrc.start & 0xfffff) =3D=3D primary_phb_addr)
-				fsl_add_bridge(np, 1);
-			else
-				fsl_add_bridge(np, 0);
-
-			hose =3D pci_find_hose_for_OF_device(np);
-			max =3D min(max, hose->dma_window_base_cur +
-					hose->dma_window_size);
-		}
-	}
+	fsl_pci_setup(primary_phb_addr);
=20
+#ifdef CONFIG_PCI
 	ppc_md.pci_exclude_device =3D mpc85xx_exclude_device;  #endif
=20
@@ -192,11 +171,8 @@ static void __init mpc85xx_ds_setup_arch(void)  #endif
=20
 #ifdef CONFIG_SWIOTLB
-	if (memblock_end_of_DRAM() > max) {
+	if (memblock_end_of_DRAM() > 0xffffffff)
 		ppc_swiotlb_enable =3D 1;
-		set_pci_dma_ops(&swiotlb_dma_ops);
-		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
-	}
 #endif
=20
 	printk("MPC85xx DS board from Freescale Semiconductor\n"); diff --git a/a=
rch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 80b8b7a.=
.4d4536f 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -402,6 +402,54 @@ int __init fsl_add_bridge(struct device_node *dev, int=
 is_primary)  }  #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
=20
+static struct of_device_id pci_ids[] =3D {
+	{ .compatible =3D "fsl,mpc8540-pci", },
+	{ .compatible =3D "fsl,mpc8548-pcie", },
+	{},
+};
+
+/**
+ * fsl_pci_setup - Initialization for PCI
+ * @primary_phb_addr: primary bus address
+ *
+ * Add bridge if pci controller is a host  */ void fsl_pci_setup(int=20
+primary_phb_addr) {
+	struct device_node *np;
+	struct pci_controller *hose;
+	dma_addr_t min_dma_addr =3D 0xffffffff;
+
+	for_each_node_by_type(np, "pci") {
+		if (of_match_node(pci_ids, np)) {
+			struct resource rsrc;
+			of_address_to_resource(np, 0, &rsrc);
+			if ((rsrc.start & 0xfffff) =3D=3D primary_phb_addr)
+				fsl_add_bridge(np, 1);
+			else
+				fsl_add_bridge(np, 0);
+
+			hose =3D pci_find_hose_for_OF_device(np);
+			min_dma_addr =3D min(min_dma_addr,
+					hose->dma_window_base_cur
+					+ hose->dma_window_size);
+
+		}
+	}
+
+#ifdef CONFIG_SWIOTLB
+	/*
+	 * if we couldn't map all of DRAM via the dma windows we need SWIOTLB
+	 * to handle buffers located outside of dma capable memory region
+	 */
+	if (memblock_end_of_DRAM() > min_dma_addr) {
+		ppc_swiotlb_enable =3D 1;
+		set_pci_dma_ops(&swiotlb_dma_ops);
+		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
+	}
+#endif
+}
+
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pc=
ie_header);
=20
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) diff --git a/a=
rch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index a39ed5c.=
.775ea21 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -89,6 +89,11 @@ struct ccsr_pci {
 };
=20
 extern int fsl_add_bridge(struct device_node *dev, int is_primary);
+#ifndef CONFIG_PCI
+#define fsl_pci_setup(p)
+#else
+extern void fsl_pci_setup(int primary_phb_addr); #endif
 extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);  extern int mpc83x=
x_add_bridge(struct device_node *dev);
 u64 fsl_pci_immrbar_base(struct pci_controller *hose);
--
1.7.5.1

Re: [PATCH 1/2] Unify pci/pcie initialization code

[Kumar Gala]

On Nov 22, 2011, at 12:20 AM, Jia Hongtao-B38951 wrote:

> Hi Kumar,
> We want more comments on this series of patches ([1/2] & [2/2]) to =
speed up the pushing-to-kernel progress.
> Thanks.

I think the code is fine, but you need to update it for all the boards =
include the 86xx ones.

- k

>=20
> -----Original Message-----
> From: Jia Hongtao-B38951=20
> Sent: Monday, October 31, 2011 1:55 PM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: Li Yang-R58472; Gala Kumar-B11780; Jia Hongtao-B38951
> Subject: [PATCH 1/2] Unify pci/pcie initialization code
>=20
> In previous version pci/pcie initialization is in platform code which =
Initialize PCI bridge base on EP/RC or host/agent settings.
> We unified pci/pcie initialization as common APIs named fsl_pci_setup =
which can be called by platform code.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_ds.c |   30 ++-----------------
> arch/powerpc/sysdev/fsl_pci.c            |   48 =
++++++++++++++++++++++++++++++
> arch/powerpc/sysdev/fsl_pci.h            |    5 +++
> 3 files changed, 56 insertions(+), 27 deletions(-)
>=20
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c =
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
> index 10e7db0..7188c0b 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
> @@ -157,33 +157,12 @@ extern void __init mpc85xx_smp_init(void);  =
#endif  static void __init mpc85xx_ds_setup_arch(void)  { -#ifdef =
CONFIG_PCI
> -	struct device_node *np;
> -	struct pci_controller *hose;
> -#endif
> -	dma_addr_t max =3D 0xffffffff;
> -
> 	if (ppc_md.progress)
> 		ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
>=20
> -#ifdef CONFIG_PCI
> -	for_each_node_by_type(np, "pci") {
> -		if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
> -		    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
> -		    of_device_is_compatible(np, "fsl,p2020-pcie")) {
> -			struct resource rsrc;
> -			of_address_to_resource(np, 0, &rsrc);
> -			if ((rsrc.start & 0xfffff) =3D=3D =
primary_phb_addr)
> -				fsl_add_bridge(np, 1);
> -			else
> -				fsl_add_bridge(np, 0);
> -
> -			hose =3D pci_find_hose_for_OF_device(np);
> -			max =3D min(max, hose->dma_window_base_cur +
> -					hose->dma_window_size);
> -		}
> -	}
> +	fsl_pci_setup(primary_phb_addr);
>=20
> +#ifdef CONFIG_PCI
> 	ppc_md.pci_exclude_device =3D mpc85xx_exclude_device;  #endif
>=20
> @@ -192,11 +171,8 @@ static void __init mpc85xx_ds_setup_arch(void)  =
#endif
>=20
> #ifdef CONFIG_SWIOTLB
> -	if (memblock_end_of_DRAM() > max) {
> +	if (memblock_end_of_DRAM() > 0xffffffff)
> 		ppc_swiotlb_enable =3D 1;
> -		set_pci_dma_ops(&swiotlb_dma_ops);
> -		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> -	}
> #endif
>=20
> 	printk("MPC85xx DS board from Freescale Semiconductor\n"); diff =
--git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c =
index 80b8b7a..4d4536f 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -402,6 +402,54 @@ int __init fsl_add_bridge(struct device_node =
*dev, int is_primary)  }  #endif /* CONFIG_FSL_SOC_BOOKE || =
CONFIG_PPC_86xx */
>=20
> +static struct of_device_id pci_ids[] =3D {
> +	{ .compatible =3D "fsl,mpc8540-pci", },
> +	{ .compatible =3D "fsl,mpc8548-pcie", },
> +	{},
> +};
> +
> +/**
> + * fsl_pci_setup - Initialization for PCI
> + * @primary_phb_addr: primary bus address
> + *
> + * Add bridge if pci controller is a host  */ void fsl_pci_setup(int=20=

> +primary_phb_addr) {
> +	struct device_node *np;
> +	struct pci_controller *hose;
> +	dma_addr_t min_dma_addr =3D 0xffffffff;
> +
> +	for_each_node_by_type(np, "pci") {
> +		if (of_match_node(pci_ids, np)) {
> +			struct resource rsrc;
> +			of_address_to_resource(np, 0, &rsrc);
> +			if ((rsrc.start & 0xfffff) =3D=3D =
primary_phb_addr)
> +				fsl_add_bridge(np, 1);
> +			else
> +				fsl_add_bridge(np, 0);
> +
> +			hose =3D pci_find_hose_for_OF_device(np);
> +			min_dma_addr =3D min(min_dma_addr,
> +					hose->dma_window_base_cur
> +					+ hose->dma_window_size);
> +
> +		}
> +	}
> +
> +#ifdef CONFIG_SWIOTLB
> +	/*
> +	 * if we couldn't map all of DRAM via the dma windows we need =
SWIOTLB
> +	 * to handle buffers located outside of dma capable memory =
region
> +	 */
> +	if (memblock_end_of_DRAM() > min_dma_addr) {
> +		ppc_swiotlb_enable =3D 1;
> +		set_pci_dma_ops(&swiotlb_dma_ops);
> +		ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> +	}
> +#endif
> +}
> +
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, =
quirk_fsl_pcie_header);
>=20
> #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) diff --git =
a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index =
a39ed5c..775ea21 100644
> --- a/arch/powerpc/sysdev/fsl_pci.h
> +++ b/arch/powerpc/sysdev/fsl_pci.h
> @@ -89,6 +89,11 @@ struct ccsr_pci {
> };
>=20
> extern int fsl_add_bridge(struct device_node *dev, int is_primary);
> +#ifndef CONFIG_PCI
> +#define fsl_pci_setup(p)
> +#else
> +extern void fsl_pci_setup(int primary_phb_addr); #endif
> extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);  extern int =
mpc83xx_add_bridge(struct device_node *dev);
> u64 fsl_pci_immrbar_base(struct pci_controller *hose);
> --
> 1.7.5.1
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev