* [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 @ 2012-01-18 19:39 Kumar Gala 2012-01-18 19:39 ` [PATCH 2/2] powerpc: Add initial e6500 cpu support Kumar Gala 2012-03-16 15:15 ` [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 Kumar Gala 0 siblings, 2 replies; 4+ messages in thread From: Kumar Gala @ 2012-01-18 19:39 UTC (permalink / raw) To: linuxppc-dev The registers that describe size supported by TLB are different on MMU v2 as well as we support power of two page sizes. For now we continue to assume that FSL variable size array supports all page sizes up to the maximum one reported in TLB1PS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> --- arch/powerpc/include/asm/reg_booke.h | 1 + arch/powerpc/mm/fsl_booke_mmu.c | 19 +++++++++++++------ 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 500fe1d..8a97aa7 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -62,6 +62,7 @@ #define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */ #define SPRN_MAS8 0x155 /* MMU Assist Register 8 */ #define SPRN_TLB0PS 0x158 /* TLB 0 Page Size Register */ +#define SPRN_TLB1PS 0x159 /* TLB 1 Page Size Register */ #define SPRN_MAS5_MAS6 0x15c /* MMU Assist Register 5 || 6 */ #define SPRN_MAS8_MAS1 0x15d /* MMU Assist Register 8 || 1 */ #define SPRN_EPTCFG 0x15e /* Embedded Page Table Config */ diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index 66a6fd3..07ba45b 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c @@ -149,12 +149,19 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys, unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, phys_addr_t phys) { - unsigned int camsize = __ilog2(ram) & ~1U; - unsigned int align = __ffs(virt | phys) & ~1U; - unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf; - - /* Convert (4^max) kB to (2^max) bytes */ - max_cam = max_cam * 2 + 10; + unsigned int camsize = __ilog2(ram); + unsigned int align = __ffs(virt | phys); + unsigned long max_cam; + + if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) { + /* Convert (4^max) kB to (2^max) bytes */ + max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10; + camsize &= ~1U; + align &= ~1U; + } else { + /* Convert (2^max) kB to (2^max) bytes */ + max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10; + } if (camsize > align) camsize = align; -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] powerpc: Add initial e6500 cpu support 2012-01-18 19:39 [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 Kumar Gala @ 2012-01-18 19:39 ` Kumar Gala 2012-03-16 15:15 ` Kumar Gala 2012-03-16 15:15 ` [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 Kumar Gala 1 sibling, 1 reply; 4+ messages in thread From: Kumar Gala @ 2012-01-18 19:39 UTC (permalink / raw) To: linuxppc-dev Add basic support for e6500 core in its single threaded mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> --- arch/powerpc/include/asm/cputable.h | 12 ++++++++---- arch/powerpc/kernel/cputable.c | 18 ++++++++++++++++++ 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index ad55a1c..b9219e9 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h @@ -390,6 +390,10 @@ extern const char *powerpc_base_platform; CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ CPU_FTR_DEBUG_LVL_EXC) +#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \ + CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ + CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ + CPU_FTR_DEBUG_LVL_EXC) #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) /* 64-bit CPUs */ @@ -442,7 +446,7 @@ extern const char *powerpc_base_platform; #ifdef __powerpc64__ #ifdef CONFIG_PPC_BOOK3E -#define CPU_FTRS_POSSIBLE (CPU_FTRS_E5500 | CPU_FTRS_A2) +#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500 | CPU_FTRS_A2) #else #define CPU_FTRS_POSSIBLE \ (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ @@ -483,7 +487,7 @@ enum { #endif #ifdef CONFIG_E500 CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC | - CPU_FTRS_E5500 | + CPU_FTRS_E5500 | CPU_FTRS_E6500 | #endif 0, }; @@ -491,7 +495,7 @@ enum { #ifdef __powerpc64__ #ifdef CONFIG_PPC_BOOK3E -#define CPU_FTRS_ALWAYS (CPU_FTRS_E5500 & CPU_FTRS_A2) +#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2) #else #define CPU_FTRS_ALWAYS \ (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ @@ -528,7 +532,7 @@ enum { #endif #ifdef CONFIG_E500 CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC & - CPU_FTRS_E5500 & + CPU_FTRS_E5500 & CPU_FTRS_E6500 & #endif CPU_FTRS_POSSIBLE, }; diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 81db9e2..4dccf51 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -2019,6 +2019,24 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_e500mc, .platform = "ppce5500", }, + { /* e6500 */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x80400000, + .cpu_name = "e6500", + .cpu_features = CPU_FTRS_E6500, + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, + .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | + MMU_FTR_USE_TLBILX, + .icache_bsize = 64, + .dcache_bsize = 64, + .num_pmcs = 4, + .oprofile_cpu_type = "ppc/e6500", + .oprofile_type = PPC_OPROFILE_FSL_EMB, + .cpu_setup = __setup_cpu_e5500, + .cpu_restore = __restore_cpu_e5500, + .machine_check = machine_check_e500mc, + .platform = "ppce6500", + }, #ifdef CONFIG_PPC32 { /* default match */ .pvr_mask = 0x00000000, -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] powerpc: Add initial e6500 cpu support 2012-01-18 19:39 ` [PATCH 2/2] powerpc: Add initial e6500 cpu support Kumar Gala @ 2012-03-16 15:15 ` Kumar Gala 0 siblings, 0 replies; 4+ messages in thread From: Kumar Gala @ 2012-03-16 15:15 UTC (permalink / raw) To: linuxppc-dev On Jan 18, 2012, at 1:39 PM, Kumar Gala wrote: > Add basic support for e6500 core in its single threaded mode. > > Signed-off-by: Kumar Gala <galak@kernel.crashing.org> > --- > arch/powerpc/include/asm/cputable.h | 12 ++++++++---- > arch/powerpc/kernel/cputable.c | 18 ++++++++++++++++++ > 2 files changed, 26 insertions(+), 4 deletions(-) applied - k ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 2012-01-18 19:39 [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 Kumar Gala 2012-01-18 19:39 ` [PATCH 2/2] powerpc: Add initial e6500 cpu support Kumar Gala @ 2012-03-16 15:15 ` Kumar Gala 1 sibling, 0 replies; 4+ messages in thread From: Kumar Gala @ 2012-03-16 15:15 UTC (permalink / raw) To: linuxppc-dev On Jan 18, 2012, at 1:39 PM, Kumar Gala wrote: > The registers that describe size supported by TLB are different on MMU > v2 as well as we support power of two page sizes. For now we continue > to assume that FSL variable size array supports all page sizes up to the > maximum one reported in TLB1PS. > > Signed-off-by: Kumar Gala <galak@kernel.crashing.org> > --- > arch/powerpc/include/asm/reg_booke.h | 1 + > arch/powerpc/mm/fsl_booke_mmu.c | 19 +++++++++++++------ > 2 files changed, 14 insertions(+), 6 deletions(-) applied - k ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-03-16 15:24 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-01-18 19:39 [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 Kumar Gala 2012-01-18 19:39 ` [PATCH 2/2] powerpc: Add initial e6500 cpu support Kumar Gala 2012-03-16 15:15 ` Kumar Gala 2012-03-16 15:15 ` [PATCH 1/2] powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2 Kumar Gala
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