From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from acsinet14.oracle.com (acsinet14.oracle.com [141.146.126.236]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "acsinet14.oracle.com", Issuer "VeriSign Class 3 International Server CA - G3" (not verified)) by ozlabs.org (Postfix) with ESMTPS id BF2E7B6F6F for ; Sat, 28 Jan 2012 14:27:36 +1100 (EST) Received: from acsinet15.oracle.com (acsinet15.oracle.com [141.146.126.227]) by acsinet14.oracle.com (Switch-3.4.4/Switch-3.4.1) with ESMTP id q0S2o7HK024738 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Sat, 28 Jan 2012 02:50:07 GMT From: Yinghai Lu To: Jesse Barnes , Benjamin Herrenschmidt , Tony Luck Subject: [PATCH 06/13] PCI, powerpc: Register busn_res for root buses Date: Fri, 27 Jan 2012 18:49:24 -0800 Message-Id: <1327718971-9598-7-git-send-email-yinghai@kernel.org> In-Reply-To: <1327718971-9598-1-git-send-email-yinghai@kernel.org> References: <1327718971-9598-1-git-send-email-yinghai@kernel.org> Cc: linux-arch@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Linus Torvalds , Paul Mackerras , Bjorn Helgaas , Yinghai Lu List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Signed-off-by: Yinghai Lu Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: linuxppc-dev@lists.ozlabs.org --- arch/powerpc/kernel/pci-common.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index cce98d7..501f29b 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -1732,6 +1732,8 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose) bus->secondary = hose->first_busno; hose->bus = bus; + pci_bus_insert_busn_res(bus, hose->first_busno, hose->last_busno); + /* Get probe mode and perform scan */ mode = PCI_PROBE_NORMAL; if (node && ppc_md.pci_probe_mode) @@ -1742,8 +1744,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose) of_scan_bus(node, bus); } - if (mode == PCI_PROBE_NORMAL) + if (mode == PCI_PROBE_NORMAL) { + pci_bus_update_busn_res_end(bus, 255); hose->last_busno = bus->subordinate = pci_scan_child_bus(bus); + pci_bus_update_busn_res_end(bus, bus->subordinate); + } /* Platform gets a chance to do some global fixups before * we proceed to resource allocation -- 1.7.7