[PATCH] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

[PATCH] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

[Shengzhou Liu]

when missing USB PHY clock, kernel booting up will halt during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hang in this case.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
 drivers/usb/host/ehci-fsl.c |   11 +++++++++--
 drivers/usb/host/ehci-fsl.h |    1 +
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b556a72..834237e 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
 }
 
-static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
+static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 {
 	struct usb_hcd *hcd = ehci_to_hcd(ehci);
 	struct fsl_usb2_platform_data *pdata;
@@ -299,12 +299,19 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 #endif
 		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
 	}
+
+	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {
+		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
+		return -1;
+	}
+	return 0;
 }
 
 /* called after powerup, by probe or system-pm "wakeup" */
 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
 {
-	ehci_fsl_usb_setup(ehci);
+	if (ehci_fsl_usb_setup(ehci))
+		return -1;
 	ehci_port_power(ehci, 0);
 
 	return 0;
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index 4918062..dd3dc47 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -45,5 +45,6 @@
 #define FSL_SOC_USB_PRICTRL	0x40c	/* NOTE: big-endian */
 #define FSL_SOC_USB_SICTRL	0x410	/* NOTE: big-endian */
 #define FSL_SOC_USB_CTRL	0x500	/* NOTE: big-endian */
+#define CTRL_PHY_CLK_VALID      (1 << 17)
 #define SNOOP_SIZE_2GB		0x1e
 #endif				/* _EHCI_FSL_H */
-- 
1.6.4

Re: [PATCH] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

[Pavan Kondeti]

On 2/1/2012 2:50 PM, Shengzhou Liu wrote:
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index b556a72..834237e 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
>  	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
>  }
>  
> -static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
> +static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
>  {
>  	struct usb_hcd *hcd = ehci_to_hcd(ehci);
>  	struct fsl_usb2_platform_data *pdata;
> @@ -299,12 +299,19 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
>  #endif
>  		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
>  	}
> +
> +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {
> +		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> +		return -1;

Please return a proper error code. -ENODEV ?

> +	}
> +	return 0;
>  }
>  


-- 
Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

RE: [PATCH] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

[Liu Shengzhou-B36685]

> -----Original Message-----
> From: Pavan Kondeti [mailto:pkondeti@codeaurora.org]
> Sent: Wednesday, February 01, 2012 6:11 PM
> To: Liu Shengzhou-B36685
> Cc: linux-usb@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] powerpc/usb: fix issue of CPU halt when missing
> USB PHY clock
>=20
> On 2/1/2012 2:50 PM, Shengzhou Liu wrote:
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-
> fsl.c
> > index b556a72..834237e 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd
> *ehci,
> >  	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
> >  }
> >
> > -static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
> > +static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
> >  {
> >  	struct usb_hcd *hcd =3D ehci_to_hcd(ehci);
> >  	struct fsl_usb2_platform_data *pdata; @@ -299,12 +299,19 @@
> static
> > void ehci_fsl_usb_setup(struct ehci_hcd *ehci)  #endif
> >  		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
> >  	}
> > +
> > +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID))
> {
> > +		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> > +		return -1;
>=20
> Please return a proper error code. -ENODEV ?

[Shengzhou] Ok, updated in v2, thanks.
>=20
> > +	}
> > +	return 0;
> >  }
> >
> --
> Sent by a consultant of the Qualcomm Innovation Center, Inc.
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> Forum.

RE: [PATCH] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

[Benjamin Herrenschmidt]

> > > +	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID))
> > {
> > > +		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> > > +		return -1;
> > 
> > Please return a proper error code. -ENODEV ?
> 
> [Shengzhou] Ok, updated in v2, thanks.
> >

Note that I just got a p5020ds from FSL, and with it's default
configuration, when I build & boot current upstream with FSL USB
support (64-bit kernel) it hangs when initializing USB.

With or without this patch.

It complains about invalid dr-mode (there's two USB nodes in the .dts
coming from uboot, an "mph" and "dr", the former has no dr-mode property
in the device-tree.

Is the current kernel incompatible with old device-tree's ? (that would
be a shame...)

Cheers,
Ben.

RE: [PATCH] powerpc/usb: fix issue of CPU halt when missing USB PHY clock

[Liu Shengzhou-B36685]

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