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From: Gavin Shan <shangw@linux.vnet.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: Gavin Shan <shangw@linux.vnet.ibm.com>
Subject: [PATCH V3 0/8] ppc/pnv: Rework on pnv P7IOC initialization
Date: Mon, 25 Jun 2012 23:43:13 +0800	[thread overview]
Message-ID: <1340639001-28152-1-git-send-email-shangw@linux.vnet.ibm.com> (raw)

The rework is done based on Ben's initial ideas on how PE and resource
assignment is done on top of PCI core instead of doing resource assignment
by powernv platform. With the series of patches, the following aspects will
be covered:

	- Only create PE based on PCI bus. Basically, there will be 2 types
	  of PEs built on PCI bus: (A) PE only includes single PCI bus. (B)
	  PE includes the PCI bus as well as its subordinate PCI buses.
	- Make the I/O and MMIO resources of P2P bridge aligned according to
	  the PHB's resource layout. For example, MMIO resource of P2P bridges
	  will be aligned with 16MB if PHB has 16MB M32 segment.
	- The resource allocation will be done on basis of PE.
	- Trivial fixup on the hook of enabling PCI device, PE check etc.

The series of patches has been verified on Firebird-L and Juno-IOC-L based on
kernel 3.4.RC6. During the kernel boots, USB HUBs can be detected and initialized
correctly. Also, the disk drive as well as network interfaces can work successfully
after booting into shell environment.

V1 -> V2
	- Add separate field into "struct pci_host_bridge" to trace the minimal
	  alignment of prefetchable MMIO bars for P2P bridges (Benjamin Herrenschmidt)
	- Reduced variable names while measuring the MMIO bars (Benjamin Herrenschmidt)
	- Change the commit log for more clear description on [PATCH 2/8] (Benjamin Herrenschmidt)
	- Change the commit log for more clear description on the types of PCI bus
	  sensitive PEs on [PATCH 5/8] (Richard Yang)

V2 -> V3
	- Rework the sequence of the patches so that it won't break "git bitsect" (Benjamin Herrenschmidt)
	- Cleanup on variables name so that they have shorter length (Benjamin Herrenschmidt)
	- Rework on PE's resource calculation based on the PCI bus (Benjamin Herrenschmidt)
	- Cleanup on changelog (Benjamin Herrenschmidt)
	

arch/powerpc/platforms/powernv/pci-ioda.c |  708 ++++++++---------------------
arch/powerpc/platforms/powernv/pci.h      |   21 +-
2 files changed, 213 insertions(+), 516 deletions(-)

Thanks,
Gavin

             reply	other threads:[~2012-06-25 16:04 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-25 15:43 Gavin Shan [this message]
2012-06-25 15:43 ` [PATCH 1/8] ppc/pnv: create bus sensitive PEs Gavin Shan
2012-08-01  7:49   ` Richard Yang
2012-08-01  8:26     ` Gavin Shan
2012-08-01  9:04       ` Richard Yang
2012-08-01  9:18         ` Gavin Shan
2012-06-25 15:43 ` [PATCH 2/8] ppc/pnv: PE list based on creation order Gavin Shan
2012-06-25 15:43 ` [PATCH 3/8] ppc/pnv: I/O and MMIO resource assignment for PEs Gavin Shan
2012-06-25 15:43 ` [PATCH 4/8] ppc/pnv: initialize DMA " Gavin Shan
2012-06-25 15:43 ` [PATCH 5/8] ppc/pnv: skip check on PE if necessary Gavin Shan
2012-06-25 15:43 ` [PATCH 6/8] ppc/pnv: fix overrunning segment tracing array Gavin Shan
2012-06-25 15:43 ` [PATCH 7/8] ppc/pnv: using PCI core to do resource assignment Gavin Shan
2012-06-25 15:43 ` [PATCH 8/8] ppc/pnv: remove unused functions Gavin Shan

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