* [PATCH 0/3] Raid: enable talitos xor offload for improving performance
@ 2012-07-10 5:54 Qiang Liu
0 siblings, 0 replies; 6+ messages in thread
From: Qiang Liu @ 2012-07-10 5:54 UTC (permalink / raw)
To: linux-crypto, linuxppc-dev
The following 4 patches enabling fsl-dma and talitos offload raid
operations for improving raid performance and balancing CPU load.
Write performance will be improved by 40% tested by iozone. CPU load
will be reduced by 8%.
Qiang Liu (4):
Talitos: move the data structure into header file
Talitos: Support for async_tx XOR offload
fsl-dma: support attribute of DMA_MEMORY when async_tx enabled
Talitos: fix the issue of dma memory leak
drivers/crypto/Kconfig | 9 +
drivers/crypto/talitos.c | 520 ++++++++++++++++++++++++++++++++++++----------
drivers/crypto/talitos.h | 161 ++++++++++++++
drivers/dma/fsldma.c | 78 +++-----
4 files changed, 606 insertions(+), 162 deletions(-)
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 0/3] Raid: enable talitos xor offload for improving performance
@ 2012-07-10 5:56 Qiang Liu
2012-07-10 5:56 ` [PATCH 1/4] Talitos: move the data structure into header file Qiang Liu
0 siblings, 1 reply; 6+ messages in thread
From: Qiang Liu @ 2012-07-10 5:56 UTC (permalink / raw)
To: linux-crypto, linuxppc-dev
The following 4 patches enabling fsl-dma and talitos offload raid
operations for improving raid performance and balancing CPU load.
Write performance will be improved by 40% tested by iozone. CPU load
will be reduced by 8%.
Qiang Liu (4):
Talitos: move the data structure into header file
Talitos: Support for async_tx XOR offload
fsl-dma: support attribute of DMA_MEMORY when async_tx enabled
Talitos: fix the issue of dma memory leak
drivers/crypto/Kconfig | 9 +
drivers/crypto/talitos.c | 520 ++++++++++++++++++++++++++++++++++++----------
drivers/crypto/talitos.h | 161 ++++++++++++++
drivers/dma/fsldma.c | 78 +++-----
4 files changed, 606 insertions(+), 162 deletions(-)
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/4] Talitos: move the data structure into header file
2012-07-10 5:56 [PATCH 0/3] Raid: enable talitos xor offload for improving performance Qiang Liu
@ 2012-07-10 5:56 ` Qiang Liu
2012-07-11 0:11 ` Kim Phillips
0 siblings, 1 reply; 6+ messages in thread
From: Qiang Liu @ 2012-07-10 5:56 UTC (permalink / raw)
To: linux-crypto, linuxppc-dev; +Cc: Qiang Liu, Herbert Xu, David S. Miller
Move the declaration of talitos data structure into talitos.h.
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>
Signed-off-by: Qiang Liu <qiang.liu@freescale.com>
---
drivers/crypto/talitos.c | 108 ----------------------------------------------
drivers/crypto/talitos.h | 108 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 108 insertions(+), 108 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index dc641c7..cb9e4cd 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -53,114 +53,6 @@
#include "talitos.h"
-#define TALITOS_TIMEOUT 100000
-#define TALITOS_MAX_DATA_LEN 65535
-
-#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
-#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
-#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
-
-/* descriptor pointer entry */
-struct talitos_ptr {
- __be16 len; /* length */
- u8 j_extent; /* jump to sg link table and/or extent */
- u8 eptr; /* extended address */
- __be32 ptr; /* address */
-};
-
-static const struct talitos_ptr zero_entry = {
- .len = 0,
- .j_extent = 0,
- .eptr = 0,
- .ptr = 0
-};
-
-/* descriptor */
-struct talitos_desc {
- __be32 hdr; /* header high bits */
- __be32 hdr_lo; /* header low bits */
- struct talitos_ptr ptr[7]; /* ptr/len pair array */
-};
-
-/**
- * talitos_request - descriptor submission request
- * @desc: descriptor pointer (kernel virtual)
- * @dma_desc: descriptor's physical bus address
- * @callback: whom to call when descriptor processing is done
- * @context: caller context (optional)
- */
-struct talitos_request {
- struct talitos_desc *desc;
- dma_addr_t dma_desc;
- void (*callback) (struct device *dev, struct talitos_desc *desc,
- void *context, int error);
- void *context;
-};
-
-/* per-channel fifo management */
-struct talitos_channel {
- void __iomem *reg;
-
- /* request fifo */
- struct talitos_request *fifo;
-
- /* number of requests pending in channel h/w fifo */
- atomic_t submit_count ____cacheline_aligned;
-
- /* request submission (head) lock */
- spinlock_t head_lock ____cacheline_aligned;
- /* index to next free descriptor request */
- int head;
-
- /* request release (tail) lock */
- spinlock_t tail_lock ____cacheline_aligned;
- /* index to next in-progress/done descriptor request */
- int tail;
-};
-
-struct talitos_private {
- struct device *dev;
- struct platform_device *ofdev;
- void __iomem *reg;
- int irq[2];
-
- /* SEC version geometry (from device tree node) */
- unsigned int num_channels;
- unsigned int chfifo_len;
- unsigned int exec_units;
- unsigned int desc_types;
-
- /* SEC Compatibility info */
- unsigned long features;
-
- /*
- * length of the request fifo
- * fifo_len is chfifo_len rounded up to next power of 2
- * so we can use bitwise ops to wrap
- */
- unsigned int fifo_len;
-
- struct talitos_channel *chan;
-
- /* next channel to be assigned next incoming descriptor */
- atomic_t last_chan ____cacheline_aligned;
-
- /* request callback tasklet */
- struct tasklet_struct done_task[2];
-
- /* list of registered algorithms */
- struct list_head alg_list;
-
- /* hwrng device */
- struct hwrng rng;
-};
-
-/* .features flag */
-#define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001
-#define TALITOS_FTR_HW_AUTH_CHECK 0x00000002
-#define TALITOS_FTR_SHA224_HWINIT 0x00000004
-#define TALITOS_FTR_HMAC_OK 0x00000008
-
static void to_talitos_ptr(struct talitos_ptr *talitos_ptr, dma_addr_t dma_addr)
{
talitos_ptr->ptr = cpu_to_be32(lower_32_bits(dma_addr));
diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h
index 3c17395..21934be 100644
--- a/drivers/crypto/talitos.h
+++ b/drivers/crypto/talitos.h
@@ -28,6 +28,114 @@
*
*/
+#define TALITOS_TIMEOUT 100000
+#define TALITOS_MAX_DATA_LEN 65535
+
+#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
+#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
+#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
+
+/* descriptor pointer entry */
+struct talitos_ptr {
+ __be16 len; /* length */
+ u8 j_extent; /* jump to sg link table and/or extent */
+ u8 eptr; /* extended address */
+ __be32 ptr; /* address */
+};
+
+static const struct talitos_ptr zero_entry = {
+ .len = 0,
+ .j_extent = 0,
+ .eptr = 0,
+ .ptr = 0
+};
+
+/* descriptor */
+struct talitos_desc {
+ __be32 hdr; /* header high bits */
+ __be32 hdr_lo; /* header low bits */
+ struct talitos_ptr ptr[7]; /* ptr/len pair array */
+};
+
+/**
+ * talitos_request - descriptor submission request
+ * @desc: descriptor pointer (kernel virtual)
+ * @dma_desc: descriptor's physical bus address
+ * @callback: whom to call when descriptor processing is done
+ * @context: caller context (optional)
+ */
+struct talitos_request {
+ struct talitos_desc *desc;
+ dma_addr_t dma_desc;
+ void (*callback) (struct device *dev, struct talitos_desc *desc,
+ void *context, int error);
+ void *context;
+};
+
+/* per-channel fifo management */
+struct talitos_channel {
+ void __iomem *reg;
+
+ /* request fifo */
+ struct talitos_request *fifo;
+
+ /* number of requests pending in channel h/w fifo */
+ atomic_t submit_count ____cacheline_aligned;
+
+ /* request submission (head) lock */
+ spinlock_t head_lock ____cacheline_aligned;
+ /* index to next free descriptor request */
+ int head;
+
+ /* request release (tail) lock */
+ spinlock_t tail_lock ____cacheline_aligned;
+ /* index to next in-progress/done descriptor request */
+ int tail;
+};
+
+struct talitos_private {
+ struct device *dev;
+ struct platform_device *ofdev;
+ void __iomem *reg;
+ int irq[2];
+
+ /* SEC version geometry (from device tree node) */
+ unsigned int num_channels;
+ unsigned int chfifo_len;
+ unsigned int exec_units;
+ unsigned int desc_types;
+
+ /* SEC Compatibility info */
+ unsigned long features;
+
+ /*
+ * length of the request fifo
+ * fifo_len is chfifo_len rounded up to next power of 2
+ * so we can use bitwise ops to wrap
+ */
+ unsigned int fifo_len;
+
+ struct talitos_channel *chan;
+
+ /* next channel to be assigned next incoming descriptor */
+ atomic_t last_chan ____cacheline_aligned;
+
+ /* request callback tasklet */
+ struct tasklet_struct done_task[2];
+
+ /* list of registered algorithms */
+ struct list_head alg_list;
+
+ /* hwrng device */
+ struct hwrng rng;
+};
+
+/* .features flag */
+#define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001
+#define TALITOS_FTR_HW_AUTH_CHECK 0x00000002
+#define TALITOS_FTR_SHA224_HWINIT 0x00000004
+#define TALITOS_FTR_HMAC_OK 0x00000008
+
/*
* TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
*/
--
1.7.5.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 0/3] Raid: enable talitos xor offload for improving performance
@ 2012-07-10 6:00 Qiang Liu
0 siblings, 0 replies; 6+ messages in thread
From: Qiang Liu @ 2012-07-10 6:00 UTC (permalink / raw)
To: linux-crypto, linuxppc-dev
The following 4 patches enabling fsl-dma and talitos offload raid
operations for improving raid performance and balancing CPU load.
Write performance will be improved by 40% tested by iozone. CPU load
will be reduced by 8%.
Qiang Liu (4):
Talitos: move the data structure into header file
Talitos: Support for async_tx XOR offload
fsl-dma: support attribute of DMA_MEMORY when async_tx enabled
Talitos: fix the issue of dma memory leak
drivers/crypto/Kconfig | 9 +
drivers/crypto/talitos.c | 520 ++++++++++++++++++++++++++++++++++++----------
drivers/crypto/talitos.h | 161 ++++++++++++++
drivers/dma/fsldma.c | 78 +++-----
4 files changed, 606 insertions(+), 162 deletions(-)
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/4] Talitos: move the data structure into header file
2012-07-10 5:56 ` [PATCH 1/4] Talitos: move the data structure into header file Qiang Liu
@ 2012-07-11 0:11 ` Kim Phillips
2012-07-11 3:13 ` Liu Qiang-B32616
0 siblings, 1 reply; 6+ messages in thread
From: Kim Phillips @ 2012-07-11 0:11 UTC (permalink / raw)
To: Qiang Liu
Cc: Herbert Xu, linux-crypto, linuxppc-dev, David S. Miller,
horia.geanta
On Tue, 10 Jul 2012 13:56:46 +0800
Qiang Liu <qiang.liu@freescale.com> wrote:
> Move the declaration of talitos data structure into talitos.h.
>
> Cc: Herbert Xu <herbert@gondor.apana.org.au>
> Cc: David S. Miller <davem@davemloft.net>
> Signed-off-by: Qiang Liu <qiang.liu@freescale.com>
> ---
this patch has already been submitted [1].
Subsequent patches in this series also don't apply cleanly: can
you rebase onto [2], which is based on Herbert's cryptodev tree and
contain's Horia's four patches, and re-send?
Also note that upstream talitos does not yet contain NAPI support
[3].
Thanks,
Kim
[1] http://www.mail-archive.com/linux-crypto@vger.kernel.org/msg07299.html
[2] git://git.freescale.com/crypto/cryptodev.git
[3] http://www.mail-archive.com/linux-crypto@vger.kernel.org/msg07289.html
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 1/4] Talitos: move the data structure into header file
2012-07-11 0:11 ` Kim Phillips
@ 2012-07-11 3:13 ` Liu Qiang-B32616
0 siblings, 0 replies; 6+ messages in thread
From: Liu Qiang-B32616 @ 2012-07-11 3:13 UTC (permalink / raw)
To: Phillips Kim-R1AAHA
Cc: Li Yang-R58472, Geanta Neag Horia Ioan-B05471, Herbert Xu,
linux-crypto@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
David S. Miller
> -----Original Message-----
> From: Phillips Kim-R1AAHA
> Sent: Wednesday, July 11, 2012 8:11 AM
> To: Liu Qiang-B32616
> Cc: linux-crypto@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Li Yang-
> R58472; Herbert Xu; David S. Miller; Geanta Neag Horia Ioan-B05471
> Subject: Re: [PATCH 1/4] Talitos: move the data structure into header
> file
>=20
> On Tue, 10 Jul 2012 13:56:46 +0800
> Qiang Liu <qiang.liu@freescale.com> wrote:
>=20
> > Move the declaration of talitos data structure into talitos.h.
> >
> > Cc: Herbert Xu <herbert@gondor.apana.org.au>
> > Cc: David S. Miller <davem@davemloft.net>
> > Signed-off-by: Qiang Liu <qiang.liu@freescale.com>
> > ---
>=20
> this patch has already been submitted [1].
>=20
> Subsequent patches in this series also don't apply cleanly: can
> you rebase onto [2], which is based on Herbert's cryptodev tree and
> contain's Horia's four patches, and re-send?
Kim, Thanks for your note, I will rebase the cryptodev tree and resend
the patch again.
>=20
> Also note that upstream talitos does not yet contain NAPI support
> [3].
Thanks.
>=20
> Thanks,
>=20
> Kim
>=20
> [1] http://www.mail-archive.com/linux-
> crypto@vger.kernel.org/msg07299.html
> [2] git://git.freescale.com/crypto/cryptodev.git
> [3] http://www.mail-archive.com/linux-
> crypto@vger.kernel.org/msg07289.html
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2012-07-11 3:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-07-10 5:56 [PATCH 0/3] Raid: enable talitos xor offload for improving performance Qiang Liu
2012-07-10 5:56 ` [PATCH 1/4] Talitos: move the data structure into header file Qiang Liu
2012-07-11 0:11 ` Kim Phillips
2012-07-11 3:13 ` Liu Qiang-B32616
-- strict thread matches above, loose matches on Subject: below --
2012-07-10 6:00 [PATCH 0/3] Raid: enable talitos xor offload for improving performance Qiang Liu
2012-07-10 5:54 Qiang Liu
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).