* [PATCH 1/4] powerpc: make POWER7 setup code generic name
@ 2012-10-31 5:34 Michael Neuling
2012-10-31 5:34 ` [PATCH 2/4] powerpc: Add POWER8 setup code Michael Neuling
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Michael Neuling @ 2012-10-31 5:34 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Michael Neuling, linuxppc-dev
We are going to reuse this in POWER8 so make the name generic.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/kernel/Makefile | 2 +-
.../{cpu_setup_power7.S => cpu_setup_power.S} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename arch/powerpc/kernel/{cpu_setup_power7.S => cpu_setup_power.S} (100%)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index cde12f8..8f61934 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -38,7 +38,7 @@ obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
paca.o nvram_64.o firmware.o
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o
-obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power7.o
+obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power.o
obj64-$(CONFIG_RELOCATABLE) += reloc_64.o
obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o
obj-$(CONFIG_PPC_A2) += cpu_setup_a2.o
diff --git a/arch/powerpc/kernel/cpu_setup_power7.S b/arch/powerpc/kernel/cpu_setup_power.S
similarity index 100%
rename from arch/powerpc/kernel/cpu_setup_power7.S
rename to arch/powerpc/kernel/cpu_setup_power.S
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/4] powerpc: Add POWER8 setup code 2012-10-31 5:34 [PATCH 1/4] powerpc: make POWER7 setup code generic name Michael Neuling @ 2012-10-31 5:34 ` Michael Neuling 2012-10-31 5:34 ` [PATCH 3/4] powerpc: POWER8 cputable entry Michael Neuling 2012-10-31 5:34 ` [PATCH 4/4] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 Michael Neuling 2 siblings, 0 replies; 9+ messages in thread From: Michael Neuling @ 2012-10-31 5:34 UTC (permalink / raw) To: Benjamin Herrenschmidt; +Cc: Michael Neuling, linuxppc-dev Just a copy of POWER7 for now. Will update with new code later. Signed-off-by: Michael Neuling <mikey@neuling.org> --- arch/powerpc/kernel/cpu_setup_power.S | 24 ++++++++++++++++++++++++ arch/powerpc/kernel/cputable.c | 2 ++ 2 files changed, 26 insertions(+) diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 76797c5..a92101d 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S @@ -44,6 +44,30 @@ _GLOBAL(__restore_cpu_power7) mtlr r11 blr +_GLOBAL(__setup_cpu_power8) + mflr r11 + bl __init_hvmode_206 + mtlr r11 + beqlr + li r0,0 + mtspr SPRN_LPID,r0 + bl __init_LPCR + bl __init_TLB + mtlr r11 + blr + +_GLOBAL(__restore_cpu_power8) + mflr r11 + mfmsr r3 + rldicl. r0,r3,4,63 + beqlr + li r0,0 + mtspr SPRN_LPID,r0 + bl __init_LPCR + bl __init_TLB + mtlr r11 + blr + __init_hvmode_206: /* Disable CPU_FTR_HVMODE and exit if MSR:HV is not set */ mfmsr r3 diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 0514c21..361f6d9 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -68,6 +68,8 @@ extern void __restore_cpu_pa6t(void); extern void __restore_cpu_ppc970(void); extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); extern void __restore_cpu_power7(void); +extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); +extern void __restore_cpu_power8(void); extern void __restore_cpu_a2(void); #endif /* CONFIG_PPC64 */ #if defined(CONFIG_E500) -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] powerpc: POWER8 cputable entry 2012-10-31 5:34 [PATCH 1/4] powerpc: make POWER7 setup code generic name Michael Neuling 2012-10-31 5:34 ` [PATCH 2/4] powerpc: Add POWER8 setup code Michael Neuling @ 2012-10-31 5:34 ` Michael Neuling 2012-10-31 5:34 ` [PATCH 4/4] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 Michael Neuling 2 siblings, 0 replies; 9+ messages in thread From: Michael Neuling @ 2012-10-31 5:34 UTC (permalink / raw) To: Benjamin Herrenschmidt; +Cc: Michael Neuling, linuxppc-dev Signed-off-by: Michael Neuling <mikey@neuling.org> --- arch/powerpc/include/asm/cputable.h | 12 ++++++++++-- arch/powerpc/include/asm/mmu.h | 1 + arch/powerpc/include/asm/reg.h | 1 + arch/powerpc/kernel/cputable.c | 21 +++++++++++++++++++++ 4 files changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 21a0687..76f81bd 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h @@ -401,6 +401,14 @@ extern const char *powerpc_base_platform; CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \ CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY) +#define CPU_FTRS_POWER8 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ + CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\ + CPU_FTR_MMCRA | CPU_FTR_SMT | \ + CPU_FTR_COHERENT_ICACHE | \ + CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ + CPU_FTR_DSCR | CPU_FTR_SAO | \ + CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ + CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY) #define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ @@ -421,8 +429,8 @@ extern const char *powerpc_base_platform; #define CPU_FTRS_POSSIBLE \ (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ - CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \ - CPU_FTR_VSX) + CPU_FTRS_POWER7 | CPU_FTRS_POWER8 | CPU_FTRS_CELL | \ + CPU_FTRS_PA6T | CPU_FTR_VSX) #endif #else enum { diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index 5e38eed..691fd8a 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -101,6 +101,7 @@ #define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE +#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE #define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ MMU_FTR_CI_LARGE_PAGE #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index d24c141..7b44a6e 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -1029,6 +1029,7 @@ #define PVR_970MP 0x0044 #define PVR_970GX 0x0045 #define PVR_POWER7p 0x004A +#define PVR_POWER8 0x004B #define PVR_BE 0x0070 #define PVR_PA6T 0x0090 diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 361f6d9..216ff84 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -96,6 +96,10 @@ extern void __restore_cpu_e5500(void); PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ PPC_FEATURE_TRUE_LE | \ PPC_FEATURE_PSERIES_PERFMON_COMPAT) +#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ + PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PERFMON_COMPAT) #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ PPC_FEATURE_TRUE_LE | \ PPC_FEATURE_HAS_ALTIVEC_COMP) @@ -465,6 +469,23 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_restore = __restore_cpu_power7, .platform = "power7+", }, + { /* Power8 */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x004b0000, + .cpu_name = "POWER8 (raw)", + .cpu_features = CPU_FTRS_POWER8, + .cpu_user_features = COMMON_USER_POWER8, + .mmu_features = MMU_FTRS_POWER8, + .icache_bsize = 128, + .dcache_bsize = 128, + .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, + .oprofile_cpu_type = "ppc64/power8", + .oprofile_type = PPC_OPROFILE_POWER4, + .cpu_setup = __setup_cpu_power8, + .cpu_restore = __restore_cpu_power8, + .platform = "power8", + }, { /* Cell Broadband Engine */ .pvr_mask = 0xffff0000, .pvr_value = 0x00700000, -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/4] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 2012-10-31 5:34 [PATCH 1/4] powerpc: make POWER7 setup code generic name Michael Neuling 2012-10-31 5:34 ` [PATCH 2/4] powerpc: Add POWER8 setup code Michael Neuling 2012-10-31 5:34 ` [PATCH 3/4] powerpc: POWER8 cputable entry Michael Neuling @ 2012-10-31 5:34 ` Michael Neuling 2012-11-09 6:23 ` [PATCH] " Michael Neuling 2012-11-09 6:26 ` [PATCH] powerpc: Add POWER8 architected mode to cputable Michael Neuling 2 siblings, 2 replies; 9+ messages in thread From: Michael Neuling @ 2012-10-31 5:34 UTC (permalink / raw) To: Benjamin Herrenschmidt; +Cc: Michael Neuling, linuxppc-dev Update ibm,architecture.vec for Sub-Processor Representation Level. Allows us to support more than one parition per core. This is untested so far as we don't have pHyp Signed-off-by: Michael Neuling <mikey@neuling.org> --- arch/powerpc/kernel/prom_init.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index cb6c123..09b1c7c 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -707,6 +707,7 @@ static void __init early_cmdline_parse(void) #define OV5_PFO_HW_RNG 0x80 /* PFO Random Number Generator */ #define OV5_PFO_HW_842 0x40 /* PFO Compression Accelerator */ #define OV5_PFO_HW_ENCR 0x20 /* PFO Encryption Accelerator */ +#define OV5_SUB_PROCESSORS 0x01 /* 1,2,or 4 Sub-Processors supported */ /* Option Vector 6: IBM PAPR hints */ #define OV6_LINUX 0x02 /* Linux is our OS */ @@ -755,7 +756,7 @@ static unsigned char ibm_architecture_vec[] = { OV4_MIN_ENT_CAP, /* minimum VP entitled capacity */ /* option vector 5: PAPR/OF options */ - 18 - 2, /* length */ + 19 - 2, /* length */ 0, /* don't ignore, don't halt */ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | OV5_DONATE_DEDICATE_CPU | OV5_MSI, @@ -776,6 +777,7 @@ static unsigned char ibm_architecture_vec[] = { 0, 0, OV5_PFO_HW_RNG | OV5_PFO_HW_ENCR | OV5_PFO_HW_842, + OV5_SUB_PROCESSORS, /* option vector 6: IBM PAPR hints */ 4 - 2, /* length */ 0, -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 2012-10-31 5:34 ` [PATCH 4/4] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 Michael Neuling @ 2012-11-09 6:23 ` Michael Neuling 2012-11-15 3:53 ` [PATCH] powerpc/pseries: Fix IBM_ARCH_VEC_NRCORES_OFFSET for POWER8 updates Michael Neuling 2012-11-09 6:26 ` [PATCH] powerpc: Add POWER8 architected mode to cputable Michael Neuling 1 sibling, 1 reply; 9+ messages in thread From: Michael Neuling @ 2012-11-09 6:23 UTC (permalink / raw) To: Benjamin Herrenschmidt, linuxppc-dev Update ibm,architecture.vec for POWER8 and allows us to support more than one parition per core. Signed-off-by: Michael Neuling <mikey@neuling.org> --- v2: Missed some bits in the original post.. arch/powerpc/kernel/prom_init.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index cb6c123..9ffb542 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -671,6 +671,7 @@ static void __init early_cmdline_parse(void) #define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */ #define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */ #define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */ +#define OV1_PPC_2_07 0x01 /* set if we support PowerPC 2.07 */ /* Option vector 2: Open Firmware options supported */ #define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */ @@ -707,6 +708,7 @@ static void __init early_cmdline_parse(void) #define OV5_PFO_HW_RNG 0x80 /* PFO Random Number Generator */ #define OV5_PFO_HW_842 0x40 /* PFO Compression Accelerator */ #define OV5_PFO_HW_ENCR 0x20 /* PFO Encryption Accelerator */ +#define OV5_SUB_PROCESSORS 0x01 /* 1,2,or 4 Sub-Processors supported */ /* Option Vector 6: IBM PAPR hints */ #define OV6_LINUX 0x02 /* Linux is our OS */ @@ -719,6 +721,8 @@ static unsigned char ibm_architecture_vec[] = { W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ W(0xffff0000), W(0x003e0000), /* POWER6 */ W(0xffff0000), W(0x003f0000), /* POWER7 */ + W(0xffff0000), W(0x004b0000), /* POWER8 */ + W(0xffffffff), W(0x0f000004), /* all 2.07-compliant */ W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */ W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */ W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ @@ -728,7 +732,7 @@ static unsigned char ibm_architecture_vec[] = { 3 - 2, /* length */ 0, /* don't ignore, don't halt */ OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 | - OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06, + OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06 | OV1_PPC_2_07, /* option vector 2: Open Firmware options supported */ 34 - 2, /* length */ @@ -755,7 +759,7 @@ static unsigned char ibm_architecture_vec[] = { OV4_MIN_ENT_CAP, /* minimum VP entitled capacity */ /* option vector 5: PAPR/OF options */ - 18 - 2, /* length */ + 19 - 2, /* length */ 0, /* don't ignore, don't halt */ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | OV5_DONATE_DEDICATE_CPU | OV5_MSI, @@ -776,6 +780,7 @@ static unsigned char ibm_architecture_vec[] = { 0, 0, OV5_PFO_HW_RNG | OV5_PFO_HW_ENCR | OV5_PFO_HW_842, + OV5_SUB_PROCESSORS, /* option vector 6: IBM PAPR hints */ 4 - 2, /* length */ 0, -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH] powerpc/pseries: Fix IBM_ARCH_VEC_NRCORES_OFFSET for POWER8 updates 2012-11-09 6:23 ` [PATCH] " Michael Neuling @ 2012-11-15 3:53 ` Michael Neuling 0 siblings, 0 replies; 9+ messages in thread From: Michael Neuling @ 2012-11-15 3:53 UTC (permalink / raw) To: Benjamin Herrenschmidt; +Cc: linuxppc-dev In supporting POWER8 we added 16 bytes to the start of the ibm_architecture_vec, but forgot to add this to IBM_ARCH_VEC_NRCORES_OFFSET. This caused us to hit this warning in early boot: WARNING ! ibm_architecture_vec structure inconsistent: 805372128 This add this extra 16 bytes of offset. Signed-off-by: Michael Neuling <mikey@neuling.org> diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 9ffb542..779f340 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -773,7 +773,7 @@ static unsigned char ibm_architecture_vec[] = { * must match by the macro below. Update the definition if * the structure layout changes. */ -#define IBM_ARCH_VEC_NRCORES_OFFSET 101 +#define IBM_ARCH_VEC_NRCORES_OFFSET 117 W(NR_CPUS), /* number of cores supported */ 0, 0, ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH] powerpc: Add POWER8 architected mode to cputable 2012-10-31 5:34 ` [PATCH 4/4] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 Michael Neuling 2012-11-09 6:23 ` [PATCH] " Michael Neuling @ 2012-11-09 6:26 ` Michael Neuling 2012-11-09 8:47 ` Gabriel Paubert 1 sibling, 1 reply; 9+ messages in thread From: Michael Neuling @ 2012-11-09 6:26 UTC (permalink / raw) To: Benjamin Herrenschmidt; +Cc: linuxppc-dev A PVR of 0x0F000004 means we are arch v2.07 complicate ie, POWER8. Signed-off-by: Michael Neuling <mikey@neuling.org> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 216ff84..75a3d71 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -435,6 +435,21 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_restore = __restore_cpu_power7, .platform = "power7", }, + { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ + .pvr_mask = 0xffffffff, + .pvr_value = 0x0f000004, + .cpu_name = "POWER8 (architected)", + .cpu_features = CPU_FTRS_POWER8, + .cpu_user_features = COMMON_USER_POWER8, + .mmu_features = MMU_FTRS_POWER8, + .icache_bsize = 128, + .dcache_bsize = 128, + .oprofile_type = PPC_OPROFILE_POWER4, + .oprofile_cpu_type = "ppc64/ibm-compat-v1", + .cpu_setup = __setup_cpu_power8, + .cpu_restore = __restore_cpu_power8, + .platform = "power8", + }, { /* Power7 */ .pvr_mask = 0xffff0000, .pvr_value = 0x003f0000, ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] powerpc: Add POWER8 architected mode to cputable 2012-11-09 6:26 ` [PATCH] powerpc: Add POWER8 architected mode to cputable Michael Neuling @ 2012-11-09 8:47 ` Gabriel Paubert 2012-11-09 9:56 ` Michael Neuling 0 siblings, 1 reply; 9+ messages in thread From: Gabriel Paubert @ 2012-11-09 8:47 UTC (permalink / raw) To: Michael Neuling; +Cc: linuxppc-dev On Fri, Nov 09, 2012 at 05:26:42PM +1100, Michael Neuling wrote: > A PVR of 0x0F000004 means we are arch v2.07 complicate ie, POWER8. Huh? s/complicate/compliant/ ? Also ie has to be written with dots (i.e.). Gabriel > > Signed-off-by: Michael Neuling <mikey@neuling.org> > > diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c > index 216ff84..75a3d71 100644 > --- a/arch/powerpc/kernel/cputable.c > +++ b/arch/powerpc/kernel/cputable.c > @@ -435,6 +435,21 @@ static struct cpu_spec __initdata cpu_specs[] = { > .cpu_restore = __restore_cpu_power7, > .platform = "power7", > }, > + { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ > + .pvr_mask = 0xffffffff, > + .pvr_value = 0x0f000004, > + .cpu_name = "POWER8 (architected)", > + .cpu_features = CPU_FTRS_POWER8, > + .cpu_user_features = COMMON_USER_POWER8, > + .mmu_features = MMU_FTRS_POWER8, > + .icache_bsize = 128, > + .dcache_bsize = 128, > + .oprofile_type = PPC_OPROFILE_POWER4, > + .oprofile_cpu_type = "ppc64/ibm-compat-v1", > + .cpu_setup = __setup_cpu_power8, > + .cpu_restore = __restore_cpu_power8, > + .platform = "power8", > + }, > { /* Power7 */ > .pvr_mask = 0xffff0000, > .pvr_value = 0x003f0000, > _______________________________________________ > Linuxppc-dev mailing list > Linuxppc-dev@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/linuxppc-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] powerpc: Add POWER8 architected mode to cputable 2012-11-09 8:47 ` Gabriel Paubert @ 2012-11-09 9:56 ` Michael Neuling 0 siblings, 0 replies; 9+ messages in thread From: Michael Neuling @ 2012-11-09 9:56 UTC (permalink / raw) To: Gabriel Paubert; +Cc: linuxppc-dev > On Fri, Nov 09, 2012 at 05:26:42PM +1100, Michael Neuling wrote: > > A PVR of 0x0F000004 means we are arch v2.07 complicate ie, POWER8. > > Huh? > > s/complicate/compliant/ ? Yes, compliant. Thanks > Also ie has to be written with dots (i.e.). Thanks. Mikey ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2012-11-15 3:53 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-10-31 5:34 [PATCH 1/4] powerpc: make POWER7 setup code generic name Michael Neuling 2012-10-31 5:34 ` [PATCH 2/4] powerpc: Add POWER8 setup code Michael Neuling 2012-10-31 5:34 ` [PATCH 3/4] powerpc: POWER8 cputable entry Michael Neuling 2012-10-31 5:34 ` [PATCH 4/4] powerpc/pseries: Update ibm, architecture.vec for PAPR 2.7/POWER8 Michael Neuling 2012-11-09 6:23 ` [PATCH] " Michael Neuling 2012-11-15 3:53 ` [PATCH] powerpc/pseries: Fix IBM_ARCH_VEC_NRCORES_OFFSET for POWER8 updates Michael Neuling 2012-11-09 6:26 ` [PATCH] powerpc: Add POWER8 architected mode to cputable Michael Neuling 2012-11-09 8:47 ` Gabriel Paubert 2012-11-09 9:56 ` Michael Neuling
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