From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe005.messaging.microsoft.com [216.32.181.185]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 67E562C00AA for ; Wed, 21 Nov 2012 01:00:21 +1100 (EST) From: Varun Sethi To: , , , , , Subject: [PATCH 2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure. Date: Tue, 20 Nov 2012 19:24:55 +0530 Message-ID: <1353419697-31269-3-git-send-email-Varun.Sethi@freescale.com> In-Reply-To: <1353419697-31269-1-git-send-email-Varun.Sethi@freescale.com> References: <1353419697-31269-1-git-send-email-Varun.Sethi@freescale.com> MIME-Version: 1.0 Content-Type: text/plain Cc: Varun Sethi List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , PAMU bypass enable register added to the ccsr_guts structure. Signed-off-by: Timur Tabi Signed-off-by: Varun Sethi --- arch/powerpc/include/asm/fsl_guts.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h index aa4c488..bb208eb 100644 --- a/arch/powerpc/include/asm/fsl_guts.h +++ b/arch/powerpc/include/asm/fsl_guts.h @@ -69,7 +69,9 @@ struct ccsr_guts { u8 res0c4[0x224 - 0xc4]; __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ - u8 res22c[0x800 - 0x22c]; + u8 res22c[0x604 - 0x22c]; + __be32 pamubypenr; /* 0x.604 - PAMU bypass enable register */ + u8 res608[0x800 - 0x608]; __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ u8 res804[0x900 - 0x804]; __be32 ircr; /* 0x.0900 - Infrared Control Register */ -- 1.7.4.1