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* [PATCH] mpic: fix Destination Registers init problem
@ 2013-02-07  8:07 Zhao Chenhui
  2013-02-07 18:27 ` Scott Wood
  0 siblings, 1 reply; 2+ messages in thread
From: Zhao Chenhui @ 2013-02-07  8:07 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: linux-kernel

The Freescale implementation of the MPIC only allows a single CPU
destination for non-IPI interrupts. Test the flag MPIC_SINGLE_DEST_CPU
to check if the Destination registers should be set.

This prevents more than one bit is set at secondary processors
initilizing time if the flag MPIC_SINGLE_DEST_CPU is set.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/sysdev/mpic.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9c6e535..cc537f8 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1675,7 +1675,7 @@ void mpic_setup_this_cpu(void)
 	 * it differently, then we should make sure we also change the default
 	 * values of irq_desc[].affinity in irq.c.
  	 */
-	if (distribute_irqs) {
+	if (distribute_irqs && !(mpic->flags & MPIC_SINGLE_DEST_CPU)) {
 	 	for (i = 0; i < mpic->num_sources ; i++)
 			mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION),
 				mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION)) | msk);
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] mpic: fix Destination Registers init problem
  2013-02-07  8:07 [PATCH] mpic: fix Destination Registers init problem Zhao Chenhui
@ 2013-02-07 18:27 ` Scott Wood
  0 siblings, 0 replies; 2+ messages in thread
From: Scott Wood @ 2013-02-07 18:27 UTC (permalink / raw)
  To: Zhao Chenhui; +Cc: linuxppc-dev, linux-kernel

On 02/07/2013 02:07:00 AM, Zhao Chenhui wrote:
> The Freescale implementation of the MPIC only allows a single CPU
> destination for non-IPI interrupts. Test the flag MPIC_SINGLE_DEST_CPU
> to check if the Destination registers should be set.
>=20
> This prevents more than one bit is set at secondary processors
> initilizing time if the flag MPIC_SINGLE_DEST_CPU is set.
>=20
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
>  arch/powerpc/sysdev/mpic.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index 9c6e535..cc537f8 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -1675,7 +1675,7 @@ void mpic_setup_this_cpu(void)
>  	 * it differently, then we should make sure we also change the =20
> default
>  	 * values of irq_desc[].affinity in irq.c.
>   	 */
> -	if (distribute_irqs) {
> +	if (distribute_irqs && !(mpic->flags & MPIC_SINGLE_DEST_CPU)) {
>  	 	for (i =3D 0; i < mpic->num_sources ; i++)
>  			mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION),
>  				mpic_irq_read(i, =20
> MPIC_INFO(IRQ_DETINATION)) | msk);

http://patchwork.ozlabs.org/patch/211454/

-Scott=

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2013-02-07 18:27 ` Scott Wood

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