From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [RFC PATCH 05/17] powerpc: Add size argument to pgtable_cache_add
Date: Mon, 18 Feb 2013 15:58:03 +0530 [thread overview]
Message-ID: <1361183295-6958-6-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1361183295-6958-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
We will use this later with THP changes. With THP we want to create PMD with
twice the size. The second half will be used to depoist pgtable, which will
carry the hpte hash index value
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/pgtable-ppc64.h | 7 ++++++-
arch/powerpc/mm/init_64.c | 16 ++++++++--------
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 0182c20..658ba7c 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -338,8 +338,13 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
-void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
+extern void __pgtable_cache_add(unsigned index, unsigned long table_size,
+ void (*ctor)(void *));
void pgtable_cache_init(void);
+static inline void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
+{
+ return __pgtable_cache_add(shift, sizeof(void *) << shift, ctor);
+}
/*
* find_linux_pte returns the address of a linux pte for a given
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 95a4529..b378438 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -100,10 +100,10 @@ struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE];
* everything else. Caches created by this function are used for all
* the higher level pagetables, and for hugepage pagetables.
*/
-void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
+void __pgtable_cache_add(unsigned int index, unsigned long table_size,
+ void (*ctor)(void *))
{
char *name;
- unsigned long table_size = sizeof(void *) << shift;
unsigned long align = table_size;
/* When batching pgtable pointers for RCU freeing, we store
@@ -111,7 +111,7 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
* big enough to fit it.
*
* Likewise, hugeapge pagetable pointers contain a (different)
- * shift value in the low bits. All tables must be aligned so
+ * huge page size in the low bits. All tables must be aligned so
* as to leave enough 0 bits in the address to contain it. */
unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
HUGEPD_SHIFT_MASK + 1);
@@ -121,17 +121,17 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
* moment, gcc doesn't seem to recognize is_power_of_2 as a
* constant expression, so so much for that. */
BUG_ON(!is_power_of_2(minalign));
- BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE));
+ BUG_ON((index < 1) || (index > MAX_PGTABLE_INDEX_SIZE));
- if (PGT_CACHE(shift))
+ if (PGT_CACHE(index))
return; /* Already have a cache of this size */
align = max_t(unsigned long, align, minalign);
- name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
+ name = kasprintf(GFP_KERNEL, "pgtable-2^%d", index);
new = kmem_cache_create(name, table_size, align, 0, ctor);
- PGT_CACHE(shift) = new;
+ PGT_CACHE(index) = new;
- pr_debug("Allocated pgtable cache for order %d\n", shift);
+ pr_debug("Allocated pgtable cache for order %d\n", index);
}
--
1.7.10
next prev parent reply other threads:[~2013-02-18 10:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-18 10:27 [RFC PATCH 00/17] THP support for PPC64 Aneesh Kumar K.V
2013-02-18 10:27 ` [RFC PATCH 01/17] powerpc: Don't hard code the size of pte page Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 02/17] arch/powerpc: Reduce the PTE_INDEX_SIZE Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 03/17] powerpc: Reduce PTE table memory wastage Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 04/17] mm/THP: Add pmd args to pgtable deposit and withdraw APIs Aneesh Kumar K.V
2013-02-18 10:28 ` Aneesh Kumar K.V [this message]
2013-02-18 10:28 ` [RFC PATCH 06/17] powerpc/mm: Decode the pte-lp-encoding bits correctly Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 07/17] powerpc: Update tlbie/tlbiel as per ISA doc Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 08/17] powerpc: print both base and actual page size on hash failure Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 09/17] powerpc/mm: Use encode avpn where we need only avpn values Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 10/17] powerpc/mm: Fix hpte_decode to use the correct decoding for page sizes Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 11/17] powerpc: Print page size info during boot Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 12/17] powerpc/THP: Implement transparent huge pages for ppc64 Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 13/17] powerpc/THP: Add code to handle HPTE faults for large pages Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 14/17] powerpc: support for zerout withdraw Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 15/17] powerpc: hypervisor require few WIMG bit set Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 16/17] powerpc: get_user_pages_fast changes Aneesh Kumar K.V
2013-02-18 10:28 ` [RFC PATCH 17/17] powerpc: Save DAR and DSISR in pt_regs on MCE Aneesh Kumar K.V
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