From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.windriver.com (mail.windriver.com [147.11.1.11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mail.windriver.com", Issuer "Intel External Basic Issuing CA 3A" (not verified)) by ozlabs.org (Postfix) with ESMTPS id B101C2C02CC for ; Tue, 26 Feb 2013 20:33:23 +1100 (EST) From: Tiejun Chen To: , Subject: [PATCH 1/1] book3e/corenet64: increase CPU numbers by default Date: Tue, 26 Feb 2013 17:33:18 +0800 Message-ID: <1361871198-942-1-git-send-email-tiejun.chen@windriver.com> MIME-Version: 1.0 Content-Type: text/plain Cc: linuxppc-dev@lists.ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Currently we already support p5040ds which has 4 e5500 cores, but twelve dual-threaded e6500 cores are also built on T4240, we can change CONFIG_NR_CPUS with this value now. Signed-off-by: Tiejun Chen --- arch/powerpc/configs/corenet64_smp_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig index 7375961..7b0dfe3 100644 --- a/arch/powerpc/configs/corenet64_smp_defconfig +++ b/arch/powerpc/configs/corenet64_smp_defconfig @@ -2,7 +2,7 @@ CONFIG_PPC64=y CONFIG_PPC_BOOK3E_64=y # CONFIG_VIRT_CPU_ACCOUNTING is not set CONFIG_SMP=y -CONFIG_NR_CPUS=2 +CONFIG_NR_CPUS=24 CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y -- 1.7.9.5