From: Michael Neuling <mikey@neuling.org>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Neuling <mikey@neuling.org>,
linuxppc-dev@lists.ozlabs.org, Ian Munsie <imunsie@au1.ibm.com>
Subject: [PATCH 3/3] powerpc: Set DSCR bit in FSCR setup
Date: Mon, 4 Mar 2013 20:46:42 +1100 [thread overview]
Message-ID: <1362390402-17725-4-git-send-email-mikey@neuling.org> (raw)
In-Reply-To: <1362390402-17725-1-git-send-email-mikey@neuling.org>
We support DSCR so we should make sure we set it in the FSCR incase some
firmwares don't set it.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/kernel/cpu_setup_power.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index bb2d203..ea847ab 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -116,7 +116,7 @@ __init_LPCR:
__init_FSCR:
mfspr r3,SPRN_FSCR
- ori r3,r3,FSCR_TAR
+ ori r3,r3,FSCR_TAR|FSCR_DSCR
mtspr SPRN_FSCR,r3
blr
--
1.7.10.4
prev parent reply other threads:[~2013-03-04 9:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-04 9:46 [PATCH 0/3] powerpc: FSCR fixes for POWER8 Michael Neuling
2013-03-04 9:46 ` [PATCH 1/3] powerpc: Fix setting FSCR for HV=0 and secondary CPUs Michael Neuling
2013-03-05 5:06 ` Benjamin Herrenschmidt
2013-03-05 5:45 ` [PATCH 0/3] powerpc: FSCR fixes for POWER8 Michael Neuling
2013-03-05 5:45 ` [PATCH 1/3] powerpc: Fix setting FSCR for HV=0 and on secondary CPUs Michael Neuling
2013-03-05 5:45 ` [PATCH 2/3] powerpc: Add DSCR FSCR register bit definition Michael Neuling
2013-03-05 5:45 ` [PATCH 3/3] powerpc: Set DSCR bit in FSCR setup Michael Neuling
2013-03-04 9:46 ` [PATCH 2/3] powerpc: Add DSCR FSCR register bit definition Michael Neuling
2013-03-05 5:09 ` Benjamin Herrenschmidt
2013-03-04 9:46 ` Michael Neuling [this message]
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