From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e23smtp01.au.ibm.com (e23smtp01.au.ibm.com [202.81.31.143]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e23smtp01.au.ibm.com", Issuer "GeoTrust SSL CA" (not verified)) by ozlabs.org (Postfix) with ESMTPS id C070F2C0682 for ; Wed, 6 Mar 2013 17:10:57 +1100 (EST) Received: from /spool/local by e23smtp01.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 6 Mar 2013 16:04:57 +1000 Received: from d23relay04.au.ibm.com (d23relay04.au.ibm.com [9.190.234.120]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id 548712CE804A for ; Wed, 6 Mar 2013 17:10:55 +1100 (EST) Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay04.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r265wJJZ55509174 for ; Wed, 6 Mar 2013 16:58:19 +1100 Received: from d23av04.au.ibm.com (loopback [127.0.0.1]) by d23av04.au.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r266Aso9014692 for ; Wed, 6 Mar 2013 17:10:55 +1100 From: "Aneesh Kumar K.V" To: benh@kernel.crashing.org, paulus@samba.org Subject: [PATCH -V2 11/26] powerpc: Fix hpte_decode to use the correct decoding for page sizes Date: Wed, 6 Mar 2013 11:40:12 +0530 Message-Id: <1362550227-575-12-git-send-email-aneesh.kumar@linux.vnet.ibm.com> In-Reply-To: <1362550227-575-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> References: <1362550227-575-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Cc: linuxppc-dev@lists.ozlabs.org, "Aneesh Kumar K.V" List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: "Aneesh Kumar K.V" As per ISA doc, we encode base and actual page size in the LP bits of PTE. The number of bit used to encode the page sizes depend on actual page size. ISA doc lists this as PTE LP actual page size rrrr rrrz ≥8KB rrrr rrzz ≥16KB rrrr rzzz ≥32KB rrrr zzzz ≥64KB rrrz zzzz ≥128KB rrzz zzzz ≥256KB rzzz zzzz ≥512KB zzzz zzzz ≥1MB ISA doc also says "The values of the “z” bits used to specify each size, along with all possible values of “r” bits in the LP field, must result in LP values distinct from other LP values for other sizes." based on the above update hpte_decode to use the correct decoding for LP bits. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/hash_native_64.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 7b5bf94..5e7f45c 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -412,41 +412,48 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, int *psize, int *apsize, int *ssize, unsigned long *vpn) { unsigned long avpn, pteg, vpi; - unsigned long hpte_r = hpte->r; unsigned long hpte_v = hpte->v; unsigned long vsid, seg_off; - int i, size, a_size, shift, penc; + int size, a_size, shift, mask; + /* Look at the 8 bit LP value */ + unsigned int lp = (hpte->r >> LP_SHIFT) & ((1 << LP_BITS) - 1); if (!(hpte_v & HPTE_V_LARGE)) { size = MMU_PAGE_4K; a_size = MMU_PAGE_4K; } else { - for (i = 0; i < LP_BITS; i++) { - if ((hpte_r & LP_MASK(i+1)) == LP_MASK(i+1)) - break; - } - penc = LP_MASK(i+1) >> LP_SHIFT; for (size = 0; size < MMU_PAGE_COUNT; size++) { /* valid entries have a shift value */ if (!mmu_psize_defs[size].shift) continue; - for (a_size = 0; a_size < MMU_PAGE_COUNT; a_size++) { - - /* 4K pages are not represented by LP */ - if (a_size == MMU_PAGE_4K) - continue; + /* start from 1 ignoring MMU_PAGE_4K */ + for (a_size = 1; a_size < MMU_PAGE_COUNT; a_size++) { /* valid entries have a shift value */ if (!mmu_psize_defs[a_size].shift) continue; - - if (penc == mmu_psize_defs[size].penc[a_size]) + /* + * encoding bits per actual page size + * PTE LP actual page size + * rrrr rrrz ≥8KB + * rrrr rrzz ≥16KB + * rrrr rzzz ≥32KB + * rrrr zzzz ≥64KB + * ....... + */ + shift = mmu_psize_defs[a_size].shift - + mmu_psize_defs[MMU_PAGE_4K].shift; + if (shift > LP_BITS) + shift = LP_BITS; + mask = (1 << shift) - 1; + if ((lp & mask) == + mmu_psize_defs[size].penc[a_size]) { goto out; + } } } } - out: /* This works for all page sizes, and for 256M and 1T segments */ *ssize = hpte_v >> HPTE_V_SSIZE_SHIFT; -- 1.7.10