From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH -V2 08/26] powerpc: Clarify __pgtable_cache_add by renaming shift to index
Date: Wed, 6 Mar 2013 11:40:09 +0530 [thread overview]
Message-ID: <1362550227-575-9-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1362550227-575-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
With table_size as second argument, first argument of the function
is not the shift value, but rather index into the array. Rename the
variable to clarify the same.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/pgtable-ppc64.h | 2 +-
arch/powerpc/mm/init_64.c | 16 ++++++++--------
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index d51d893..658ba7c 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -338,7 +338,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
-extern void __pgtable_cache_add(unsigned shift, unsigned long table_size,
+extern void __pgtable_cache_add(unsigned index, unsigned long table_size,
void (*ctor)(void *));
void pgtable_cache_init(void);
static inline void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index d6df419..2e09ec1 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -100,7 +100,7 @@ struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE];
* everything else. Caches created by this function are used for all
* the higher level pagetables, and for hugepage pagetables.
*/
-void __pgtable_cache_add(unsigned int shift, unsigned long table_size,
+void __pgtable_cache_add(unsigned int index, unsigned long table_size,
void (*ctor)(void *))
{
char *name;
@@ -110,8 +110,8 @@ void __pgtable_cache_add(unsigned int shift, unsigned long table_size,
* the index size in the low bits. Table alignment must be
* big enough to fit it.
*
- * Likewise, hugeapge pagetable pointers contain a (different)
- * shift value in the low bits. All tables must be aligned so
+ * Likewise, hugepage pagetable pointers contain a (different)
+ * huge page size in the low bits. All tables must be aligned so
* as to leave enough 0 bits in the address to contain it. */
unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
HUGEPD_SHIFT_MASK + 1);
@@ -121,17 +121,17 @@ void __pgtable_cache_add(unsigned int shift, unsigned long table_size,
* moment, gcc doesn't seem to recognize is_power_of_2 as a
* constant expression, so so much for that. */
BUG_ON(!is_power_of_2(minalign));
- BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE));
+ BUG_ON((index < 1) || (index > MAX_PGTABLE_INDEX_SIZE));
- if (PGT_CACHE(shift))
+ if (PGT_CACHE(index))
return; /* Already have a cache of this size */
align = max_t(unsigned long, align, minalign);
- name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
+ name = kasprintf(GFP_KERNEL, "pgtable-2^%d", index);
new = kmem_cache_create(name, table_size, align, 0, ctor);
- PGT_CACHE(shift) = new;
+ PGT_CACHE(index) = new;
- pr_debug("Allocated pgtable cache for order %d\n", shift);
+ pr_debug("Allocated pgtable cache for order %d\n", index);
}
--
1.7.10
next prev parent reply other threads:[~2013-03-06 6:10 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-06 6:10 [PATCH -V2 00/26]T HP support for PPC64 Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 01/26] powerpc: Use signed formatting when printing error Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 02/26] powerpc: Save DAR and DSISR in pt_regs on MCE Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 03/26] powerpc: Don't hard code the size of pte page Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 04/26] powerpc: Reduce the PTE_INDEX_SIZE Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 05/26] powerpc: Move the pte free routines from common header Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 06/26] powerpc: Reduce PTE table memory wastage Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 07/26] powerpc: Add size argument to pgtable_cache_add Aneesh Kumar K.V
2013-03-13 2:47 ` Paul Mackerras
2013-03-13 9:25 ` Aneesh Kumar K.V
2013-03-13 11:34 ` Paul Mackerras
2013-03-06 6:10 ` Aneesh Kumar K.V [this message]
2013-03-06 6:10 ` [PATCH -V2 09/26] powerpc: Use encode avpn where we need only avpn values Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 10/26] powerpc: Decode the pte-lp-encoding bits correctly Aneesh Kumar K.V
2013-03-13 4:09 ` Paul Mackerras
2013-03-06 6:10 ` [PATCH -V2 11/26] powerpc: Fix hpte_decode to use the correct decoding for page sizes Aneesh Kumar K.V
2013-03-13 2:56 ` Paul Mackerras
2013-03-06 6:10 ` [PATCH -V2 12/26] powerpc: Return all the valid pte ecndoing in KVM_PPC_GET_SMMU_INFO ioctl Aneesh Kumar K.V
2013-03-13 4:11 ` Paul Mackerras
2013-03-06 6:10 ` [PATCH -V2 13/26] powerpc: Update tlbie/tlbiel as per ISA doc Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 14/26] powerpc: print both base and actual page size on hash failure Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 15/26] powerpc: Print page size info during boot Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 16/26] mm/THP: HPAGE_SHIFT is not a #define on some arch Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 17/26] mm/THP: Add pmd args to pgtable deposit and withdraw APIs Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 18/26] mm/THP: withdraw the pgtable after pmdp related operations Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 19/26] powerpc/THP: Implement transparent huge pages for ppc64 Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 20/26] powerpc/THP: Differentiate THP PMD entries from HUGETLB PMD entries Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 21/26] powerpc/THP: Add code to handle HPTE faults for large pages Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 22/26] powerpc: Handle huge page in perf callchain Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 23/26] powerpc/THP: hypervisor require few WIMG bit set Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 24/26] powerpc/THP: get_user_pages_fast changes Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 25/26] powerpc/THP: Enable THP on PPC64 Aneesh Kumar K.V
2013-03-06 6:10 ` [PATCH -V2 26/26] powerpc: Optimize hugepage invalidate Aneesh Kumar K.V
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