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From: Scott Wood <scottwood@freescale.com>
To: Leekha Shaveta-B20052 <B20052@freescale.com>
Cc: Wood Scott-B07421 <B07421@freescale.com>,
	Zhao Chenhui-B35336 <B35336@freescale.com>,
	Mehresh Ramneek-B31383 <B31383@freescale.com>,
	Garg Vakul-B16394 <B16394@freescale.com>,
	Lian Minghuan-B31939 <B31939@freescale.com>,
	Tang Yuantian-B29983 <B29983@freescale.com>,
	Fleming Andy-AFLEMING <afleming@freescale.com>,
	Sethi Varun-B16395 <B16395@freescale.com>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420
Date: Wed, 3 Apr 2013 11:39:54 -0500	[thread overview]
Message-ID: <1365007194.25627.1@snotra> (raw)
In-Reply-To: <E12D2F89F87F4A49B0320A4C2DE7E74915165F@039-SN2MPN1-011.039d.mgd.msft.net> (from B20052@freescale.com on Wed Apr  3 01:42:14 2013)

On 04/03/2013 01:42:14 AM, Leekha Shaveta-B20052 wrote:
>=20
>=20
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Wednesday, April 03, 2013 12:49 AM
> To: Leekha Shaveta-B20052
> Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian =20
> Minghuan-B31939; Leekha Shaveta-B20052; Garg Vakul-B16394; Tang =20
> Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi =20
> Varun-B16395
> Subject: Re: [PATCH 2/5] powerpc/fsl-booke: Add initial silicon =20
> device tree files for B4860 and B4420
>=20
> On 04/02/2013 02:16:05 AM, Shaveta Leekha wrote:
> > +/ {
> > +	compatible =3D "fsl,B4860";
> > +
> > +	cpus {
> > +		cpu1: PowerPC,e6500@1 {
> > +			device_type =3D "cpu";
> > +			reg =3D <2 3>;
> > +			next-level-cache =3D <&L2>;
> > +		};
> > +		cpu2: PowerPC,e6500@2 {
> > +			device_type =3D "cpu";
> > +			reg =3D <4 5>;
> > +			next-level-cache =3D <&L2>;
> > +		};
> > +		cpu3: PowerPC,e6500@3 {
> > +			device_type =3D "cpu";
> > +			reg =3D <6 7>;
> > +			next-level-cache =3D <&L2>;
> > +		};
>=20
> The unit addresses need to match "reg".
> [SL] You mean  "@1" should match to "reg =3D <2 3>" ?

Yes, it should be "@2" for that node.

> As each e6500 core in B4860 is dual- threaded, reg property here =20
> represents the thread's identifier in that PA core.
>=20
> So convention used in T4 and B4 is: core 0 having threads 0 and 1,
> 						Core 1 having <2 3> and =20
> so on....

The convention used in device trees is that the unit address matches =20
the reg.

-Scott=

  reply	other threads:[~2013-04-03 16:40 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-02  7:16 [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420 Shaveta Leekha
2013-04-02  7:16 ` [PATCH 3/5] powerpc/fsl-booke: Add initial B4860QDS and B4420QDS board device tree Shaveta Leekha
2013-04-02  7:16 ` [PATCH 4/5] powerpc/fsl-booke: Add B4_QDS board support Shaveta Leekha
2013-04-03 16:42   ` Kumar Gala
2013-04-04  7:10     ` Leekha Shaveta-B20052
2013-04-02  7:16 ` [PATCH 5/5] powerpc/85xx: Update corenet64_smp_defconfig for B4_QDS Shaveta Leekha
2013-04-02 19:19 ` [PATCH 2/5] powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420 Scott Wood
2013-04-03  6:42   ` Leekha Shaveta-B20052
2013-04-03 16:39     ` Scott Wood [this message]
2013-04-04  7:03       ` Leekha Shaveta-B20052
2013-04-04 19:13         ` Kumar Gala
2013-04-05  5:23           ` Leekha Shaveta-B20052
2013-04-03 16:39 ` Kumar Gala
2013-04-04  7:10   ` Leekha Shaveta-B20052
2013-04-04 19:13     ` Kumar Gala
2013-04-05  5:26       ` Leekha Shaveta-B20052

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