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From: Scott Wood <scottwood@freescale.com>
To: Jia Hongtao-B38951 <B38951@freescale.com>
Cc: Wood Scott-B07421 <B07421@freescale.com>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
	Li Yang-R58472 <r58472@freescale.com>
Subject: Re: [PATCH V5] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
Date: Thu, 11 Apr 2013 09:47:03 -0500	[thread overview]
Message-ID: <1365691623.3640.0@snotra> (raw)
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01C35D42@039-SN1MPN1-003.039d.mgd.msft.net> (from B38951@freescale.com on Thu Apr 11 04:14:51 2013)

On 04/11/2013 04:14:51 AM, Jia Hongtao-B38951 wrote:
>=20
>=20
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Thursday, April 11, 2013 5:52 AM
> > To: Jia Hongtao-B38951
> > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood =20
> Scott-
> > B07421; Li Yang-R58472; Jia Hongtao-B38951
> > Subject: Re: [PATCH V5] powerpc/85xx: Add machine check handler to =20
> fix
> > PCIe erratum on mpc85xx
> >
> > The X and (especially for PCI) BRX versions are important -- =20
> probably
> > more so than the U versions.  I doubt we need the A variant.
>=20
> Then I will add X and BRX variant and remove A variant.
>=20
> >
> > If you do support the A variant, why are you not sign-extending the
> > value?
>=20
> Just curious, sign-extending the value means fill rd with 0xffffffff?

Or 0xffffffffffffffff on 64-bit (even if you're not going to implement =20
64-bit instructions, the ones you do implement shouldn't misbehave =20
there).  You could write it as "regs->gpr[rd] =3D ~0UL".

-Scott=

      reply	other threads:[~2013-04-11 14:47 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-08  8:26 [PATCH V5] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx Jia Hongtao
2013-04-10  2:27 ` Jia Hongtao-B38951
2013-04-10 21:51 ` Scott Wood
2013-04-11  9:14   ` Jia Hongtao-B38951
2013-04-11 14:47     ` Scott Wood [this message]

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