From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e39.co.us.ibm.com (e39.co.us.ibm.com [32.97.110.160]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e39.co.us.ibm.com", Issuer "GeoTrust SSL CA" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 214612C03E6 for ; Tue, 18 Jun 2013 18:35:15 +1000 (EST) Received: from /spool/local by e39.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 18 Jun 2013 02:34:52 -0600 Received: from d01relay06.pok.ibm.com (d01relay06.pok.ibm.com [9.56.227.116]) by d01dlp02.pok.ibm.com (Postfix) with ESMTP id 78E1F6E803C for ; Tue, 18 Jun 2013 04:34:45 -0400 (EDT) Received: from d01av02.pok.ibm.com (d01av02.pok.ibm.com [9.56.224.216]) by d01relay06.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r5I8YJG253346544 for ; Tue, 18 Jun 2013 04:34:19 -0400 Received: from d01av02.pok.ibm.com (loopback [127.0.0.1]) by d01av02.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r5I8YIUQ021558 for ; Tue, 18 Jun 2013 05:34:19 -0300 From: Gavin Shan To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 17/31] powerpc/eeh: I/O chip post initialization Date: Tue, 18 Jun 2013 16:33:41 +0800 Message-Id: <1371544435-4943-18-git-send-email-shangw@linux.vnet.ibm.com> In-Reply-To: <1371544435-4943-1-git-send-email-shangw@linux.vnet.ibm.com> References: <1371544435-4943-1-git-send-email-shangw@linux.vnet.ibm.com> Cc: Gavin Shan List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , The post initialization (struct eeh_ops::post_init) is called after the EEH probe is done. On the other hand, the EEH core post initialization is designed to call platform and then I/O chip backend on PowerNV platform. The patch adds the backend for I/O chip to notify the platform that the specific PHB is ready to supply EEH service. Signed-off-by: Gavin Shan --- arch/powerpc/platforms/powernv/eeh-ioda.c | 21 ++++++++++++++++++++- 1 files changed, 20 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c index f12e888..7b27241 100644 --- a/arch/powerpc/platforms/powernv/eeh-ioda.c +++ b/arch/powerpc/platforms/powernv/eeh-ioda.c @@ -34,8 +34,27 @@ #include "powernv.h" #include "pci.h" +/** + * ioda_eeh_post_init - Chip dependent post initialization + * @hose: PCI controller + * + * The function will be called after eeh PEs and devices + * have been built. That means the EEH is ready to supply + * service with I/O cache. + */ +static int ioda_eeh_post_init(struct pci_controller *hose) +{ + struct pnv_phb *phb = hose->private_data; + + /* FIXME: Enable it for PHB3 later */ + if (phb->type == PNV_PHB_IODA1) + phb->eeh_enabled = 1; + + return 0; +} + struct pnv_eeh_ops ioda_eeh_ops = { - .post_init = NULL, + .post_init = ioda_eeh_post_init, .set_option = NULL, .get_state = NULL, .reset = NULL, -- 1.7.5.4