From: Michael Ellerman <michael@ellerman.id.au>
To: <linuxppc-dev@ozlabs.org>
Cc: sukadev@linux.vnet.ibm.com, Paul Mackerras <paulus@samba.org>,
khandual@linux.vnet.ibm.com
Subject: [PATCH 6/9] powerpc/perf: Drop MMCRA from thread_struct
Date: Fri, 28 Jun 2013 18:15:15 +1000 [thread overview]
Message-ID: <1372407319-718-6-git-send-email-michael@ellerman.id.au> (raw)
In-Reply-To: <1372407319-718-1-git-send-email-michael@ellerman.id.au>
In commit 59affcd "Context switch more PMU related SPRs" I added more
PMU SPRs to thread_struct, later modified in commit b11ae95. To add
insult to injury it turns out we don't need to switch MMCRA as it's
only user readable, and the value is recomputed by the PMU code.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/include/asm/processor.h | 1 -
arch/powerpc/kernel/asm-offsets.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 9fe1129..3f19df3 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -289,7 +289,6 @@ struct thread_struct {
unsigned long sier;
unsigned long mmcr0;
unsigned long mmcr2;
- unsigned long mmcra;
#endif
};
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index dc684b1..c7e8afc 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -132,7 +132,6 @@ int main(void)
DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
- DEFINE(THREAD_MMCRA, offsetof(struct thread_struct, mmcra));
#endif
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
--
1.7.10.4
next prev parent reply other threads:[~2013-06-28 8:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-28 8:15 [PATCH 1/9] powerpc/perf: Check that events only include valid bits on Power8 Michael Ellerman
2013-06-28 8:15 ` [PATCH 2/9] powerpc/perf: Rework disable logic in pmu_disable() Michael Ellerman
2013-06-28 8:15 ` [PATCH 3/9] powerpc/perf: Freeze PMC5/6 if we're not using them Michael Ellerman
2013-06-28 8:15 ` [PATCH 4/9] powerpc/perf: Use existing out label in power_pmu_enable() Michael Ellerman
2013-06-28 8:15 ` [PATCH 5/9] powerpc/perf: Don't enable if we have zero events Michael Ellerman
2013-06-28 8:15 ` Michael Ellerman [this message]
2013-06-28 8:15 ` [PATCH 7/9] powerpc/perf: Core EBB support for 64-bit book3s Michael Ellerman
2013-06-28 8:15 ` [PATCH 8/9] powerpc/perf: Add power8 EBB support Michael Ellerman
2013-06-28 8:15 ` [PATCH 9/9] powerpc/pseries: Inform the hypervisor we are using EBB regs Michael Ellerman
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