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From: Scott Wood <scottwood@freescale.com>
To: Po Liu <Po.Liu@freescale.com>
Cc: linuxppc-dev@ozlabs.org, Mingkai Hu <Mingkai.Hu@freescale.com>,
	afleming@freescale.com, Po Liu <Po.Liu@freescale.com>
Subject: Re: [PATCH v2 3/3] powerpc/85xx: Add C293PCIE board support
Date: Fri, 26 Jul 2013 16:59:16 -0500	[thread overview]
Message-ID: <1374875956.30721.27@snotra> (raw)
In-Reply-To: <1374806479-812-3-git-send-email-Po.Liu@freescale.com> (from Po.Liu@freescale.com on Thu Jul 25 21:41:19 2013)

On 07/25/2013 09:41:19 PM, Po Liu wrote:
> +		partition@1900000 {
> +			/* 7MB for User Area */
> +			reg =3D <0x01900000 0x00700000>;
> +			label =3D "NAND User area";
> +		};
> +
> +		partition@2000000 {
> +			/* 96MB for Root File System */
> +			reg =3D <0x02000000 0x06000000>;
> +			label =3D "NAND Root File System";
> +		};
> +
> +		partition@8000000 {
> +			/* 3968MB for Others */
> +			reg =3D <0x08000000 0xF8000000>;
> +			label =3D "NAND Others";
> +		};

Again, what is the difference between "user area" and "others"?  I'm =20
not even sure why it needs to be separate from "root file system", but =20
at least the root filesystem should be larger given the size of the =20
overall flash.

Also please use lowercase for hex.

> +	};
> +
> +	cpld@2,0 {
> +		#address-cells =3D <1>;
> +		#size-cells =3D <1>;
> +		compatible =3D "fsl,c293pcie-cpld";
> +		reg =3D <0x2 0x0 0x20>;
> +	};

Remove #address-cells/#size-cells

> +			partition@580000 {
> +				/* 10.5MB for Compressed RFS Image */
> +				reg =3D <0x00580000 0x00a80000>;
> +				label =3D "SPI Flash Compressed RFSImage";
> +			};

Space before "Image".  Why specifiy that it's compressed, versus some =20
other filesystem type?

-Scott=

  reply	other threads:[~2013-07-26 21:59 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-25  1:54 [PATCH 1/4] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-04-25  1:54 ` [PATCH 2/4] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-04-25  1:54 ` [PATCH 3/4] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-22 22:58   ` [3/4] " Scott Wood
2013-07-23  7:47     ` Liu Po-B43644
2013-07-23 16:22       ` Scott Wood
2013-04-25  1:54 ` [PATCH 4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE Po Liu
2013-07-22 22:59   ` [4/4] " Scott Wood
2013-07-22 23:00   ` Scott Wood
2013-07-23  7:13     ` Liu Po-B43644
2013-07-26  2:41   ` [PATCH v2 1/3] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-07-26  2:41     ` [PATCH v2 2/3] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-07-26  2:41     ` [PATCH v2 3/3] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-26 21:59       ` Scott Wood [this message]
2013-07-29  2:20         ` Liu Po-B43644
2013-07-29 18:10           ` Scott Wood
2013-07-30  8:49       ` [PATCH v3 1/3] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-07-30  8:49         ` [PATCH v3 2/3] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-07-30 18:28           ` Scott Wood
2013-07-31  2:13             ` Liu Po-B43644
2013-07-31 15:46               ` Scott Wood
2013-08-01  2:32                 ` Liu Po-B43644
2013-08-07 23:24                   ` Scott Wood
2013-07-30  8:49         ` [PATCH v3 3/3] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-30 18:29           ` Scott Wood
2013-08-02  6:39           ` [PATCH v4 1/3] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-08-02  6:39             ` [PATCH v4 2/3] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-08-02  6:39             ` [PATCH v4 3/3] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-26 21:55     ` [PATCH v2 1/3] powerpc/85xx: Add SEC6.0 device tree Scott Wood
2013-07-29  2:14       ` Liu Po-B43644
2013-07-22 22:41 ` [1/4] " Scott Wood
2013-07-23  8:01   ` Liu Po-B43644
2013-07-23 23:24     ` Scott Wood

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