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From: Michael Neuling <mikey@neuling.org>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org, Matt Evans <matt@ozlabs.org>
Subject: [PATCH 2/4] powerpc: Add new save_tar() register function.
Date: Wed,  7 Aug 2013 16:11:56 +1000	[thread overview]
Message-ID: <1375855918-3625-2-git-send-email-mikey@neuling.org> (raw)
In-Reply-To: <1375855918-3625-1-git-send-email-mikey@neuling.org>

Add save_tar() function to save the Target Address Register (TAR).  This will
be used in a future patch to save the TAR earlier than it currently is.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org>
---
 arch/powerpc/include/asm/switch_to.h |  5 +++++
 arch/powerpc/kernel/entry_64.S       | 12 ++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index 49a13e0..4531068 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -15,6 +15,11 @@ extern struct task_struct *__switch_to(struct task_struct *,
 struct thread_struct;
 extern struct task_struct *_switch(struct thread_struct *prev,
 				   struct thread_struct *next);
+#ifdef CONFIG_PPC_BOOK3S_64
+extern void _save_tar(struct thread_struct *prev);
+#else
+static inline void _save_tar(struct thread_struct *prev) {}
+#endif
 
 extern void giveup_fpu(struct task_struct *);
 extern void load_up_fpu(void);
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 4674fe6..32e18f3 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -389,6 +389,18 @@ DSCR_DEFAULT:
 	.tc dscr_default[TC],dscr_default
 
 	.section	".text"
+#ifdef CONFIG_PPC_BOOK3S_64
+_GLOBAL(_save_tar)
+	/*
+	 * Back up the TAR across context switches.  Note that the TAR is not
+	 * available for use in the kernel.  (To provide this, the TAR should
+	 * be backed up/restored on exception entry/exit instead, and be in
+	 * pt_regs.  FIXME, this should be in pt_regs anyway (for debug).)
+	 */
+	mfspr	r0,SPRN_TAR
+	std	r0,THREAD_TAR(r3)
+	blr
+#endif
 
 /*
  * This routine switches between two different tasks.  The process
-- 
1.8.1.2

  reply	other threads:[~2013-08-07  6:11 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-07  6:11 [PATCH 1/4] powerpc/tm: Add checkpointed versions of some SPRs to thread_struct Michael Neuling
2013-08-07  6:11 ` Michael Neuling [this message]
2013-08-07  8:07   ` [PATCH 2/4] powerpc: Add new save_tar() register function Paul Mackerras
2013-08-07 10:55     ` Michael Neuling
2013-08-08  2:33       ` [PATCH v2 1/4] powerpc/tm: Add checkpointed versions of some SPRs to thread_struct Michael Neuling
2013-08-08  2:33       ` [PATCH v2 2/4] powerpc: Add new save_tar() register function Michael Neuling
2013-08-09  3:43         ` [PATCH v3 " Michael Neuling
2013-08-08  2:33       ` [PATCH v2 3/4] powerpc: Save the TAR register earlier Michael Neuling
2013-08-08  2:33       ` [PATCH v2 4/4] powerpc/tm: Save and restore checkpointed TAR, PPR and DSCR Michael Neuling
2013-08-09  7:29       ` [PATCH 1/5] powerpc: Fix hypervisor facility unavaliable vector number Michael Neuling
2013-08-09  7:29       ` [PATCH 2/5] powerpc: Rework setting up H/FSCR bit definitions Michael Neuling
2013-08-09  7:29       ` [PATCH 3/5] powerpc: Fix context switch DSCR on POWER8 Michael Neuling
2013-08-09  7:29       ` [PATCH 4/5] powerpc: Save the TAR register earlier Michael Neuling
2013-08-09  7:29       ` [PATCH 5/5] powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs Michael Neuling
2013-08-07  6:11 ` [PATCH 3/4] powerpc: Save the TAR register earlier Michael Neuling
2013-08-07  6:11 ` [PATCH 4/4] powerpc/tm: Save and restore checkpointed TAR, PPR and DSCR Michael Neuling

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