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From: Michael Neuling <mikey@neuling.org>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org, Matt Evans <matt@ozlabs.org>
Subject: [PATCH v2 1/4] powerpc/tm: Add checkpointed versions of some SPRs to thread_struct
Date: Thu,  8 Aug 2013 12:33:54 +1000	[thread overview]
Message-ID: <1375929237-19944-1-git-send-email-mikey@neuling.org> (raw)
In-Reply-To: <25550.1375872955@ale.ozlabs.ibm.com>

Transactional memory will restore the TAR, PPR and DSCR on transaction failure.

Add these to the thread_struct for use in the future

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org>
---
 arch/powerpc/include/asm/processor.h | 4 ++++
 arch/powerpc/kernel/asm-offsets.c    | 3 +++
 2 files changed, 7 insertions(+)

diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 47a35b0..e378ccc 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -247,6 +247,10 @@ struct thread_struct {
 	unsigned long	tm_orig_msr;	/* Thread's MSR on ctx switch */
 	struct pt_regs	ckpt_regs;	/* Checkpointed registers */
 
+	unsigned long	tm_tar;
+	unsigned long	tm_ppr;
+	unsigned long	tm_dscr;
+
 	/*
 	 * Transactional FP and VSX 0-31 register set.
 	 * NOTE: the sense of these is the opposite of the integer ckpt_regs!
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index c7e8afc..8207459 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -138,6 +138,9 @@ int main(void)
 	DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
 	DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
 	DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
+	DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
+	DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
+	DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
 	DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
 	DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct,
 					 transact_vr[0]));
-- 
1.8.1.2

  reply	other threads:[~2013-08-08  2:33 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-07  6:11 [PATCH 1/4] powerpc/tm: Add checkpointed versions of some SPRs to thread_struct Michael Neuling
2013-08-07  6:11 ` [PATCH 2/4] powerpc: Add new save_tar() register function Michael Neuling
2013-08-07  8:07   ` Paul Mackerras
2013-08-07 10:55     ` Michael Neuling
2013-08-08  2:33       ` Michael Neuling [this message]
2013-08-08  2:33       ` [PATCH v2 " Michael Neuling
2013-08-09  3:43         ` [PATCH v3 " Michael Neuling
2013-08-08  2:33       ` [PATCH v2 3/4] powerpc: Save the TAR register earlier Michael Neuling
2013-08-08  2:33       ` [PATCH v2 4/4] powerpc/tm: Save and restore checkpointed TAR, PPR and DSCR Michael Neuling
2013-08-09  7:29       ` [PATCH 1/5] powerpc: Fix hypervisor facility unavaliable vector number Michael Neuling
2013-08-09  7:29       ` [PATCH 2/5] powerpc: Rework setting up H/FSCR bit definitions Michael Neuling
2013-08-09  7:29       ` [PATCH 3/5] powerpc: Fix context switch DSCR on POWER8 Michael Neuling
2013-08-09  7:29       ` [PATCH 4/5] powerpc: Save the TAR register earlier Michael Neuling
2013-08-09  7:29       ` [PATCH 5/5] powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs Michael Neuling
2013-08-07  6:11 ` [PATCH 3/4] powerpc: Save the TAR register earlier Michael Neuling
2013-08-07  6:11 ` [PATCH 4/4] powerpc/tm: Save and restore checkpointed TAR, PPR and DSCR Michael Neuling

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