From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Scott Wood <scottwood@freescale.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v2 1/3] powerpc/booke64: add sync after writing PTE
Date: Fri, 11 Oct 2013 10:51:26 +1100 [thread overview]
Message-ID: <1381449086.5630.42.camel@pasglop> (raw)
In-Reply-To: <1381447532.7979.488.camel@snotra.buserror.net>
On Thu, 2013-10-10 at 18:25 -0500, Scott Wood wrote:
> Looking at some of the code in mm/, I suspect that the normal callers of
> set_pte_at() already have an unlock (and thus a sync)
Unlock is lwsync actually...
> already, so we may
> not even be relying on those retries. Certainly some of them do; it
> would take some effort to verify all of them.
>
> Also, without such a sync in map_kernel_page(), even with software
> tablewalk, couldn't we theoretically have a situation where a store to
> pointer X that exposes a new mapping gets reordered before the PTE store
> as seen by another CPU? The other CPU could see non-NULL X and
> dereference it, but get the stale PTE. Callers of ioremap() generally
> don't do a barrier of their own prior to exposing the result.
Hrm, we transition to the new PTE either restricts the access permission
in which case it flushes the TLB (and synchronizes with other CPUs) or
extends access (adds dirty, set pte from 0 -> populated, ...) in which
case the worst case is we see the old one and take a spurrious fault.
So the problem would only be with kernel mappings and in that case I
think we are fine. A driver doing an ioremap shouldn't then start using
that mapping on another CPU before having *informed* that other CPU of
the existence of the mapping and that should be ordered.
Ben.
next prev parent reply other threads:[~2013-10-10 23:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-14 3:50 [PATCH v2 1/3] powerpc/booke64: add sync after writing PTE Scott Wood
2013-09-14 3:50 ` [PATCH v2 2/3] powerpc/e6500: TLB miss handler with hardware tablewalk support Scott Wood
2013-09-14 3:50 ` [PATCH v2 3/3] powerpc/fsl-book3e-64: Use paca for hugetlb TLB1 entry selection Scott Wood
2013-09-15 21:38 ` [PATCH v2 1/3] powerpc/booke64: add sync after writing PTE Benjamin Herrenschmidt
2013-09-17 0:06 ` Scott Wood
2013-10-10 22:31 ` Scott Wood
2013-10-10 23:25 ` Scott Wood
2013-10-10 23:51 ` Benjamin Herrenschmidt [this message]
2013-10-11 22:07 ` Scott Wood
2013-10-11 22:34 ` Benjamin Herrenschmidt
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