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From: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
To: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Michael Ellerman <michaele@au1.ibm.com>,
	linux-kernel@vger.kernel.org,
	Stephane Eranian <eranian@google.com>,
	linuxppc-dev@ozlabs.org, Paul Mackerras <paulus@samba.org>,
	Anshuman Khandual <khandual@linux.vnet.ibm.com>
Subject: [PATCH 02/10][v6] powerpc/Power7: detect load/store instructions
Date: Tue, 15 Oct 2013 19:06:34 -0700	[thread overview]
Message-ID: <1381889202-16826-3-git-send-email-sukadev@linux.vnet.ibm.com> (raw)
In-Reply-To: <1381889202-16826-1-git-send-email-sukadev@linux.vnet.ibm.com>

Implement instr_is_load_store_2_06() to detect whether a given instruction
is one of the fixed-point or floating-point load/store instructions in the
POWER Instruction Set Architecture v2.06.

This function will be used in a follow-on patch to save memory hierarchy
information of the load/store on a Power7 system. (Power8 systems set some
bits in the SIER to identify load/store operations and hence don't need a
similar functionality).

Based on optimized code from Michael Ellerman and comments from Tom Musta.

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
Changelog[v6]
	- [Michael Ellerman, Tom Musta]: Optmize the implementation to
	  avoid for loop.

 arch/powerpc/include/asm/code-patching.h |    1 +
 arch/powerpc/lib/code-patching.c         |   45 ++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index a6f8c7a..9cc3ef1 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -34,6 +34,7 @@ int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
 unsigned long branch_target(const unsigned int *instr);
 unsigned int translate_branch(const unsigned int *dest,
 			      const unsigned int *src);
+int instr_is_load_store_2_06(const unsigned int *instr);
 
 static inline unsigned long ppc_function_entry(void *func)
 {
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 2bc9db3..49fb9d7 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -159,6 +159,51 @@ unsigned int translate_branch(const unsigned int *dest, const unsigned int *src)
 	return 0;
 }
 
+/*
+ * Determine if the op code in the instruction corresponds to a load or
+ * store instruction. Ignore the vector load instructions like evlddepx,
+ * evstddepx for now.
+ *
+ * This function is valid for POWER ISA 2.06.
+ *
+ * Reference:	PowerISA_V2.06B_Public.pdf, Sections 3.3.2 through 3.3.6
+ *		and 4.6.2 through 4.6.4, Appendix F (Opcode Maps).
+ */
+int instr_is_load_store_2_06(const unsigned int *instr)
+{
+	unsigned int op, upper, lower;
+
+	op = instr_opcode(*instr);
+
+	if ((op >= 32 && op <= 58) || (op == 61 || op == 62))
+		return true;
+
+	if (op != 31)
+		return false;
+
+	upper = op >> 5;
+	lower = op & 0x1f;
+
+	/* Short circuit as many misses as we can */
+	if (lower < 3 || lower > 23)
+		return false;
+
+	if (lower == 3) {
+		if (upper >= 16)
+			return true;
+
+		return false;
+	}
+
+	if (lower == 7 || lower == 12)
+		return true;
+
+	if (lower >= 20) /* && lower <= 23 (implicit) */
+		return true;
+
+	return false;
+}
+
 
 #ifdef CONFIG_CODE_PATCHING_SELFTEST
 
-- 
1.7.9.5

  parent reply	other threads:[~2013-10-16  2:07 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-16  2:06 [PATCH 00/10][v6] powerpc/perf: Export memory hierarchy level in Power7/8 Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 01/10][v6] powerpc: Rename branch_opcode() to instr_opcode() Sukadev Bhattiprolu
2013-10-16  2:06 ` Sukadev Bhattiprolu [this message]
2013-10-16  8:25   ` [PATCH 02/10][v6] powerpc/Power7: detect load/store instructions David Laight
2013-10-16  9:38     ` Anshuman Khandual
2013-10-16 15:39       ` Sukadev Bhattiprolu
2013-10-16 15:27     ` Sukadev Bhattiprolu
2013-10-17 17:20       ` Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 03/10][v6] tools/perf: silence compiler warnings Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 04/10][v6] tools/perf: Remove local byteorder.h Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 05/10][v6] powerpc/perf: Remove PME_ prefix for power7 events Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 06/10][v6] powerpc/perf: Export Power8 generic events in sysfs Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 07/10][v6] powerpc/perf: Add Power8 event PM_MRK_GRP_CMPL to sysfs Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 08/10][v6] powerpc/perf: Define big-endian version of perf_mem_data_src Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 09/10][v6] powerpc/perf: Export Power8 memory hierarchy info to user space Sukadev Bhattiprolu
2013-10-16  2:06 ` [PATCH 10/10][v6] powerpc/perf: Export Power7 " Sukadev Bhattiprolu

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