From: Tiejun Chen <tiejun.chen@windriver.com>
To: <scottwood@freescale.com>
Cc: linuxppc-dev@ozlabs.org
Subject: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well
Date: Wed, 20 Nov 2013 16:35:51 +0800 [thread overview]
Message-ID: <1384936551-8494-1-git-send-email-tiejun.chen@windriver.com> (raw)
CONFIG_ALTIVEC is always enabled for CoreNet64. And if we
select CONFIG_E{5,6}500_CPU this may introduce -mcpu=e500mc64
into $CFLAGS. But Altivec and Spe options not allowed with
e500mc64, so :
CC arch/powerpc/lib/xor_vmx.o
arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this target
make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1
make: *** [arch/powerpc/lib] Error 2
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
arch/powerpc/lib/Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 95a20e1..641a77d 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -40,5 +40,8 @@ obj-y += code-patching.o
obj-y += feature-fixups.o
obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
+# Altivec and Spe options not allowed with e500mc64 in GCC.
+ifeq ($(call cc-option-yn,-mcpu=e500mc64),n)
obj-$(CONFIG_ALTIVEC) += xor_vmx.o
CFLAGS_xor_vmx.o += -maltivec -mabi=altivec
+endif
--
1.7.9.5
next reply other threads:[~2013-11-20 8:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-20 8:35 Tiejun Chen [this message]
2013-11-20 16:41 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
2013-11-20 18:47 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Kumar Gala
2013-11-20 22:03 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
2013-11-21 8:59 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well "“tiejun.chen”"
2013-11-21 17:42 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
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